Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SMULL2 (vector, 8H)

Test 1: uops

Code:

  smull2 v0.8h, v0.16b, v1.16b
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)030b1e1f3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a1a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004303723000612548251000100010003983130301830373037241532895100010002000303730371110011000060073116112630100030383038303830383038
1004303723000792548251000100010003983130301830373037241532895100010002000303730371110011000000673116112630100030383038303830383038
1004303722000612548251000100010003983130301830373037241532895100010002000303730371110011000040373116112630100030383038303830383038
10043037230006125482510001000100039831303018303730372415328951000100020003037303711100110000001273116112630100030383038303830383038
1004303723000612548251000100010003983130301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303723000612548251000100010003983130301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303723000612548251000100010003983130301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303723000612548251000100010003983130301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303723000612548251000100010003983130301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303722000612548251000100010003983130301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038

Test 2: Latency 1->2

Code:

  smull2 v0.8h, v0.16b, v1.16b
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8accfd0d2d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722500061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000157100021611296340100001003003830038300383003830075
102043003722500061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000127100011611296340100001003003830038300383003830038
10204300372240006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000107100011611296340100001003003830038300383003830038
1020430037225000536295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010002807100011611296340100001003003830038300383003830038
10204300372250006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000037100011611296340100001003003830038300383003830038
10204300372250006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000107100111611296340100001003003830038300383003830134
10204300372250006129548251010010010000100100005004277313300183003730037282653287451010020010000200206523003730037111020110099100100100001000107100011611296340100001003003830038300383003830038
10204300372250006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000107105011611296340100001003003830038300383003830038
10204300372250006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000107100011611296340100001003003830038300383003830038
10204300372250006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000107100011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037225000000612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010002015006402162229630010000103003830038300383003830225
100243003722400000061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000130006402162229630010000103003830038300383003830038
1002430037225000000981295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000310006402162229630010000103003830038300383003830038
10024300372250000006129548251001010100001010000504277313130018300373003728287328767100102010000202000030037300371110021109101010000100060006402162229630010000103003830038300383003830038
10024300372250000006129548251001010100001010000504277313030018300373003728287328767100102010000202000030037300371110021109101010000100050306402162229630010000103003830038300383003830038
10024300372260000006129548251001010100001010000504277313030018300373003728287328767100102010000202000030037300371110021109101010000100010006402162229630010000103003830038300383003830038
1002430037225000000612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010006012906402162229630010000103003830038300383003830038
10024300372250004006129548251001010100001010000504277313030018300373003728287328767100102010000202000030037300371110021109101010000100030006402162229630010000103003830038300383003830038
100243003722500000053629548251001010100001010000504277313130018300373003728287328767100102010000202000030037300371110021109101010000100030006402162229630010000103003830038300383003830038
100243003722500000015629548251001010100001010000504278675130018300373003728287328767100102010000202000030179300371110021109101010000100070606402162229630010000103003830038300383003830038

Test 3: Latency 1->3

Code:

  smull2 v0.8h, v1.16b, v0.16b
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0308191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372250000177295482510100100100001001000050042773130300183300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773130300180300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773130300180300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
10204300372250008861295482510100100100001001000050042773130300180300373003728265328745101002001000020020334300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773130300180300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773130300180300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611297020100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773130300180300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773130300180300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611296340100001003003830038300383013230038
1020430037224000061295482510100100100001001000050042773130300180300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773130300180300373003728265328745101002001000020020000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000100640216222963010000103003830038300383022730038
10024300372250612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383003830038
1002430037233237612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383018030038
10024300372250612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000640216222963010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  smull2 v0.8h, v8.16b, v9.16b
  smull2 v1.8h, v8.16b, v9.16b
  smull2 v2.8h, v8.16b, v9.16b
  smull2 v3.8h, v8.16b, v9.16b
  smull2 v4.8h, v8.16b, v9.16b
  smull2 v5.8h, v8.16b, v9.16b
  smull2 v6.8h, v8.16b, v9.16b
  smull2 v7.8h, v8.16b, v9.16b
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042006015004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000051102161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001001051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001003051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000051101161120036800001002004020040200402004020040
8020420039150041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010033651101161120036800001002004020093200942004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030b1e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242004815000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020316322003680000102004020040200402004020040
800242003915000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020316322003680000102004020040200402004020040
800242003915000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020316322003680000102004020040200402004020040
800242003915000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020516352003680000102004020040201952004020040
800242003915000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000102005020516582003680000102004020040200402004020040
800242003915000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020516562003680000102004020040200402004020040
800242003915000612580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020316552003680000102004020040200402004020040
800242003915000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020516562003680000102004020040200402004020040
800242003915000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020516552003680000102004020251200402004020040
800242003915000402580010108000010800005064000020020200392003999963100198001020801042016000020039200391180021109101080000100005020216532003680000102004020040200402004020040