Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SMULL (vector, 4S)

Test 1: uops

Code:

  smull v0.4s, v0.4h, v1.4h
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)033f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10043037226125482510001000100039831313018303730372415328951000100020003037303711100110000073216222630100030383038303830383038
10043037226125482510001000100039831313018303730372415328951000100020003037303711100110003073216222630100030383038303830383038
10043037226125482510001000100039831313018303730372415328951000100020003037303711100110003073216222630100030383038303830383038
10043037236125482510001000100039831313018303730372415328951000100020003037303711100110001073216222630100030383038303830383038
10043037226125482510001000100039831313018303730372415328951000100020003037303711100110004373216222630100030383038303830383038
10043037236125482510001000100039831303018303730372415328951000100020003037303711100110000073216222630100030383038303830383038
10043037236125482510001000100039831303018303730372415328951000100020003037303711100110001073216222630100030383038303830383038
10043037236125482510001000100039831303018303730372415328951000100020003037303711100110002373216222630100030383038303830383038
10043037226125482510001000100039831313018303730372415328951000100020003037303711100110002073216222630100030383038303830383038
10043037236125482510001000100039831313018303730372415328951000100020003037303711100110000073216222630100030383038303830383038

Test 2: Latency 1->2

Code:

  smull v0.4s, v0.4h, v1.4h
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722502202954825101001001000010010000500427731303001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731313001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731303001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731313001830037300372826503287451010020010000200200003003730037111020110099100100100001000307101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731303001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731313001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731303001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731303001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
10204300372240612954825101001001000010010000500427731303001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731313001830037300372826503287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250000001682954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
10024300372250000002332954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103008530038300853008530038
10024300372250000001032954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383008530038
1002430037225000000612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
10024300372250000004872954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
1002430037225000000612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
10024300372240000001052954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300863003830038
1002430037225030010801032954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
1002430037225000000153529548251001013100241110447504277313130018300373003728287132876710010201000020200003008430037111002110910101000010010006402163229630010000103003830038300383003830038
100243003722500000137672954825100101010000101000050427731313001830037300372828732876710010201000020209743027530605111002110910101000010010606402162229630010000103003830085300383003830038

Test 3: Latency 1->3

Code:

  smull v0.4s, v1.4h, v0.4h
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03090b191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722500015061295482510100100100001001000062642773130300183003730037282653287441012520010000200200003003730037111020110099100100100001000000071221611296340100001003003830038300383003830038
10204300372250000061295482510100100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000003071011611296340100001003003830038300383003830038
10204300372250000061295482510100100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000000071011611296340100001003003830038300383003830038
10204300372250000061295482510125100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000000071011611296340100001003003830038300383003830038
10204300372250000061295482510100100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000000071011611296340100001003003830038300383003830038
10204300372250000066295482510100100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000000071011611296340100001003003830038300383003830038
10204300372250006061295482510100100100001001000050042773130300183003730037282653287651010020010000200200003003730037111020110099100100100001000003071011611296340100001003003830038300383003830038
10204300372250000061295482510100100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000000071011611296340100001003003830038300383003830038
10204300372250000061295482510100100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000000074011611296340100001003003830038300383003830038
10204300372250000061295482510100100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)033f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037224822954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037224612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037225612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037225612954825100101010000101000050427731313006530037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037225612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037225612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037224612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037225612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037225612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038
1002430037225612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010640216222963010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  smull v0.4s, v8.4h, v9.4h
  smull v1.4s, v8.4h, v9.4h
  smull v2.4s, v8.4h, v9.4h
  smull v3.4s, v8.4h, v9.4h
  smull v4.4s, v8.4h, v9.4h
  smull v5.4s, v8.4h, v9.4h
  smull v6.4s, v8.4h, v9.4h
  smull v7.4s, v8.4h, v9.4h
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)033f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042004815041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051106161120036800001002004020040200402004020040
802042003915041258010010080000100800005006400000200202003920039997339997801002008000020016000020039200391180201100991001008000010000051102161120036800001002004020040200402004020040
802042003915041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
802042003915083258010010080000100800005006400000200202003920039997339997801002008000020016000020039200391180201100991001008000010000051102161120036800001002004020040200402004020040
802042003915041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051102161120036800001002004020040200402004020040
802042003915041258010010080000100800005006400000200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
802042003915041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
802042003915041258010010080000100800005006400000200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
802042003915041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
802042003915041258010010080000100800005006400000200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030b181e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc5cficache miss (d3)d5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420059150000402580010108000010800005064000002002020039200399996310019800102080000201600002003920089118002110910108000010000050200716652003680000102004020040200402004020040
80024200391500004025800101080000108000050640000120020200392003999963100198001020800002016000020039200391180021109101080000100030050200516462003680000102004020040200402004020040
8002420039150000402580010108000010800005064000012002020039200399996310019800102080000201600002003920039118002110910108000010000050200616462003680000102004020040200402004020040
8002420039150000402580010108000010800005064000012002020039200399996310019800102080000201600002003920039118002110910108000010000050200616562003680000102004020040200402004020040
8002420039150000402580010108000010800005064000012002020039200399996310019800102080000201600002003920039118002110910108000010000050200616652003680000102004020040200402004020040
8002420039150000402580010108000010800005064000012002020039200399996310019800102080000201600002003920039118002110910108000010000050200416462003680000102004020040200402004020040
8002420039150000402580010108000010800005064000002002020039200399996310019800102080000201600002003920039118002110910108000010000050200416642003680000102004020040200402004020040
80024200391500001472580010108000010800005064000002002020039200399996310019800102080000201600002003920039118002110910108000010000050200416562003680000102004020040200402004020040
8002420039150000612580010108000010800005064000002002020039200399996310019800102080000201600002003920039118002110910108000010000050200616672003680000102004020040200402004020040
8002420039150000402580010108000010800005064000002002020039200399996310019800102080000201600002003920039118002110910108000010000050200416662003680000102004020040200402004020040