Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SRI (vector, 4H)

Test 1: uops

Code:

  sri v0.4h, v1.4h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03191e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004203715006116872510001000100026468012018203720371572318951000100020002037203711100110000073416111787100020382038203820382038
1004203715006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715008216872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715008416872510001000100026468012018203720371572318951000100020002037203711100110001073116111787100020382038203820382038
1004203715006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715006116872510001000100026468012018203720371572318951000100020002037203711100110000373216111787100020382038203820382038
1004203716006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038
1004203715006116872510001000100026468012018203720371572318951000100020002037203711100110000073116111787100020382038203820382038

Test 2: Latency 1->1

Code:

  sri v0.4h, v1.4h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03081e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102042003714900014719687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100107102161019791100001002003820038200382003820038
10204200371500006119687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007101161119791100001002003820038200382003820038
10204200371500006119687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007101161119791100001002003820038200382003820038
102042003715002100123119687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007101161119791100001002003820038200382003820038
10204200371500006119687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007102161119791100001002003820038200382003820038
1020420037150000103619687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007101161119791100001002003820038200382003820038
10204200371500006119687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007101161119791100001002003820038200382003820038
10204200371500006119687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007101161119791100001002003820038200382003820038
10204200371500006119687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007101161119791100001002003820038200382003820038
10204200371500006119687251010010010000100100005002847680120018200372003718422318745101002001000020020000200372003711102011009910010010000100007101161119791100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006406163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006404163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006403163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006404163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006404163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006403163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100001006403163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006403163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006403163319785010000102003820038200382003820038
10024200371500000006119687251001010100001010000502847680120018200372003718444318767100102010000202000020037200371110021109101010000100000006403163319785010000102003820038200382003820038

Test 3: Latency 1->2

Code:

  sri v0.4h, v0.4h, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)0318191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020420037150009006119686251010010010000100100005002847521120018200372003718409618733101002001000820020016200372003711102011009910010010000100000000011171801602197870100001002003820038200382003820038
1020420037150000019719686251010010010000100100005002847521020018200372003718409618733101002001000020020000200372003711102011009910010010000100000000011172222422197870100001002003820038200382003820038
1020420037150000019719686251010010010000100100005002847521020018200372003718409618733101002001000020020000200372003711102011009910010010000100000000011172222422197870100001002008520038200382003820038
1020420037150000006119686251010010010000100100005002847521020018200372003718428718741101002001000820020016200372003711102011009910010010000100000000011172222422197870100001002003820038200622003820038
10204200371500042006119686251010010010000100100005002847521020018200372003718428718740101002001000820020016200372003711102011009910010010000100000000011171701600198010100001002003820038200382003820038
1020420037150000006119686251010010010000100100005002847521120018200372003718428618740101002001000820020016200372003711102011009910010010000100000000011171801600198010100001002003820038200382003820038
10204200371500048006119686251010010010000100100005002847521120018200372003718428718741101002001000820020016200372003711102011009910010010000100000000011171801600198000100001002003820038200382003820038
10204200371500030006119686251010010010000100100005002847521020018200372003718428618740101002001000820020016200372003711102011009910010010000100000000011171801600198000100001002003820038200382003820038
102042003715000537006119686251010010010000100100005002847521120018200372003718428718741101002001000820020016200372003711102011009910010010000100000000011171801600198000100001002003820038200382003820038
1020420037150000006119686251010010010000100100005002847521020018200372003718428618740101002001000820020016200372003711102011009910010010000100000000011171701600198010100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)030b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371500669366163004196091591009612100481011064722855105020126203562037018464341889511076221121324220002036820368711002110910101000010000021423007895814419964110000102027620134202742027320324
100242022815200000611968625100101010000101000050284752112001820037202741845824188391001020106142221344202252008551100211091010100001000002994046403163319786010000102003820038200382003820038
100242008415002526744019261963114210072101007210107605028551051200182003720037184433187671001020100002020000200372003711100211091010100001000002807007494725319967210000102018120274202272032320038
100242003715000000611968625100101010000101045650285257712019820274200371845929188591077124108312221672202732003761100211091010100001020000006403163319786010000102018220181202752022720274
1002420274150153660061196862510010101000010100005028475211200182003720037184433187671001020100002020000200372003711100211091010100001000000006403163319786010000102003820038200382003820038
100242003715000057310461196862510010101000010100005028475211200182003720037184433187671001020100002020000200372003711100211091010100001000000006403163319786010000102003820038200382003820038
10024200371500000061196862510010101000010100005028475211200182003720037184433187671001020100002020000200372003711100211091010100001000000006403163319786010000102003820038200382003820038
10024200371500000061196862510010101000010100005028475211200182003720083184433187671001020100002020000200372022711100211091010100001000000006403163319786010000102003820038200382003820038
100242003715000000742196862510010101000010100005028475211200652003720037184433187671001020100002020000200372003711100211091010100001000000006403163319786010000102003820038200382003820038
10024200371500000061196862510010101000010100005028475211200182003720037184433187671001020100002020000200372003711100211091010100001000000006403163319786010000102003820038200382003820038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  sri v0.4h, v8.4h, #3
  movi v1.16b, 0
  sri v1.4h, v8.4h, #3
  movi v2.16b, 0
  sri v2.4h, v8.4h, #3
  movi v3.16b, 0
  sri v3.4h, v8.4h, #3
  movi v4.16b, 0
  sri v4.4h, v8.4h, #3
  movi v5.16b, 0
  sri v5.4h, v8.4h, #3
  movi v6.16b, 0
  sri v6.4h, v8.4h, #3
  movi v7.16b, 0
  sri v7.4h, v8.4h, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2509

retire (01)cycle (02)0308090b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)eb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602042008915000020150292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001002000000111101190160020062001600001002006620066200662006620066
160204200651510000030292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066
160204200651510000000292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066
160204200651500000000292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066
160204200651500000000292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066
160204200651500000000292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066
160204200651500000000292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066
160204200651500000000292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066
160204200651500000000292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066
160204200651500000000292580116100800161008002850064019602004420065200656128012820080028200160056200652006511160201100991001001600001000000000111101190160020062001600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)03191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8acbranch mispredict (cb)cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0? int output thing (e9)ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600242006515000442580010108000010800005064000011200262004520045321800102080000201600002004520045111600211091010160000100000100283114202114420042015160000102004620046200462004620046
1600242004515000442580010108000010800005064000011200262004520045321800102080000201600002004520045111600211091010160000100000100293114242113420046015160000102004620046200462004620046
16002420045150042442580010108000010800005064000011200262004520045321800102080000201600002004520045111600211091010160000100000100273114202114320123015160000102004620046200462004620046
1600242004515000442580010108000010800005064000011200262004520045321800102080000201600002004520045111600211091010160000100000100273114202112320042030160000102004620046200462004620046
1600242004515000442580111108000010800005064000011200262004920049321800102080000201600002004920049111600211091010160000100000100273115202114420042015160000102004620046200462004620046
1600242004515000502580010108000010800005064000011200262004520045321800102080000201600002004520045111600211091010160000100000100313116202118720042015160000102004620114200462004620046
1600242004515000442580010108000010800005064000011200302004920045321800102080000201600002004920049111600211091010160000100000100303223244223320042030160000102005020050200502005020046
1600242004915000502580010108000010800005064000001200302004520049321800102080000201600002004520045111600211091010160000100000100263113202114420042015160000102004620046200462004620046
1600242004515000442580010108000010800005064000011200262004520045321800102080000201600002004520045111600211091010160000100000100273114202115320042015160000102004620046200462004620046
1600242004515000442580010108000010800005064000011200262004520045321800102080000201600002004920045111600211091010160000100000100263114202114420042015160000102004620046200462004620046

Test 5: throughput

Count: 16

Code:

  sri v0.4h, v16.4h, #3
  sri v1.4h, v16.4h, #3
  sri v2.4h, v16.4h, #3
  sri v3.4h, v16.4h, #3
  sri v4.4h, v16.4h, #3
  sri v5.4h, v16.4h, #3
  sri v6.4h, v16.4h, #3
  sri v7.4h, v16.4h, #3
  sri v8.4h, v16.4h, #3
  sri v9.4h, v16.4h, #3
  sri v10.4h, v16.4h, #3
  sri v11.4h, v16.4h, #3
  sri v12.4h, v16.4h, #3
  sri v13.4h, v16.4h, #3
  sri v14.4h, v16.4h, #3
  sri v15.4h, v16.4h, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)033f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6dbddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440061300292516010810016000810016002050012801320140019400384003819977619989160120200160032200320064400384003811160201100991001001600001000011110118216012400351600001004003940039400394003940039
16020440038300292516010810016000810016002050012801320140019400384003819977619989160120200160032200320064400384003811160201100991001001600001001311110118216022400351600001004003940039400924003940039
16020440038300292516010810016000810016002050012801320040019400384003819977619989160120200160032200320064400384003811160201100991001001600001000011110118216012400351600001004003940039400394003940039
16020440038300292516010810016000810016002050012801320140019400384003819977619989160120200160032200320064400384003811160201100991001001600001001011110118216122400351600001004003940039400394003940039
160204400383007942516010810016000810016002050012801320040019400384003819977619989160120200160032200320064400384003811160201100991001001600001000011110118216022400351600001004003940039400394003940039
160204400383002192516010810016000810016002050012801320040019400384003819977619989160120200160032200320064400384003811160201100991001001600001000011110118216022400351600001004003940039400394003940039
16020440038300292516010810016000810016002050012801320040019400384003819977619989160120200160032200320064400384003811160201100991001001600001000011110118116022400351600001004003940039400904003940039
16020440038300292516010810016000810016002050012801320040019400384003819977619989160120200160032200320064400384003811160201100991001001600001000011110118216023400351600001004003940039400394003940039
16020440038300292516010810016000810016002050012801320140019400384003819977619989160120200160032200320064400384003811160201100991001001600001002011110118117022400351600001004003940039400394003940039
16020440038300292516010810016000810016002050012801320040019400384003819977619989160120200160032200320064400384003811160201100991001001600001000011110118216022400351600001004003940039400394003940039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0304181e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa7a8accfd0d2icache miss (d3)itlb miss (d4)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002440050300101110053251600101016000010160000501280000154001940038400381999632001816001020160000203200004003840038111600211091010160000100001002282103216211232940035155160000104003940039400394003940039
16002440038300000005125160010101600001016000050128000015400194003840038199963200181600102016000020320000400384003811160021109101016000010000100261162131163223131400353110160000104003940039400394003940039
16002440038300103017825160196101600001016000050128000015400194003840243199963200181600102016000020320000400384003811160021109101016000010000100251162131163223031400353110160000104003940039400394003940039
16002440038300100005725160010101600001016000050128000015400194003840038199963200181600102016000020320000400384003811160021109101016000010000100261162129163221830400353110160000104003940039400394003940039
16002440038300100015725160010101600001016000050128000015400194003840038199963200181600102016000020320000400384003811160021109101016000010000100261162115163222815400353110160000104024540039400394003940039
16002440038300100005725160010101600001016000050128000015400194003840038199963200181600102016000020320000400384003811160021109101016000010000100251162129163221729400353110160000104003940039400394003940039
16002440038299100015725160010101600001016000050128076415400194003840038200013200181600102016000020320000400384003811160021109101016000010006100771162125163222929400353110160000104003940039400394003940237
16002440038300100005125160010101600001016000050128000015400194003840038199963200181600102016000020320000400384003811160021109101016000010000100251162118163223131400353110160000104003940039400394003940039
16002440038300100005725160010101600001016000050128000015400194003840038199963200181600102016000020320782400384003811160021109101016000010000100251162131163222929400353110160000104003940039400394003940039
160024400383001000151251600101016000010160000501280000154001940038400381999621200181600102016000020320000400384003811160021109101016000010000100261162117163222923400353110160000104003940039400394003940243