Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SRI (vector, D)

Test 1: uops

Code:

  sri d0, d1, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03191e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100420371500611687251000100010002646800201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371500611687251000100010002646801201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371500611687251000100010002646800201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371500611687251000100010002646800201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371600891687251000100010002646801201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371500611687251000100010002646800201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371600611687251000100010002646800201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371500611687251000100010002646800201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371500611687251000100010002646801201820372037157231895100010002000203720371110011000073216221787100020382038203820382038
100420371500611687251000100010002646800201820372037157231895100010002000203720371110011000073216221787100020382038203820382038

Test 2: Latency 1->1

Code:

  sri d0, d1, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102042003715054061196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038
10204200371490061196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000003071011611197910100001002003820038200382003820038
10204200371500061196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038
10204200371500061196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038
102042003715063061196872510100100100001001000057728476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038
10204200371500061196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038
10204200371502402838196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038
102042003715024061196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038
10204200371500061196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038
102042003715021061196872510100100100001001000050028476800200182003720037184223187451010020010000200200002003720037111020110099100100100001000000071011611197910100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03181e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371500144611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038
10024200371490351611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038
1002420037150024611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038
1002420037150036611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010036403163319785010000102003820038200382003820038
100242003715000611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038
100242003715000611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038
100242003715000611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038
100242003715000611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038
1002420037150096611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038
100242003715000611968725100101010000101000050284768012001820037200371844431876710010201000020200002003720037111002110910101000010006403163319785010000102003820038200382003820038

Test 3: Latency 1->2

Code:

  sri d0, d0, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03080b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020420037150000000061196862510100100100001001000050028475210200182003720037184286187411010020010008200200162003720037111020110099100100100001000000300011171701600198010100001002003820038200382003820038
10204200371500000000632196862510100100100001001000050028475210200182003720037184096187331010020010000200200002003720084111020110099100100100001000000000011172222422197870100001002003820038200382003820038
1020420037150000000097196862510100100100001001000050028475210200182003720037184096187331010020010000200200002003720037111020110099100100100001000000000011172222422197870100001002003820038200382003820038
1020420037150000000097196862510100100100001001000050028475210200182003720037184096187331010020010000200200002003720037111020110099100100100001000000400011172222422197870100001002003820038200382003820038
102042003715000000007621968625101001001000010010000500284752102001820037200371840961873310100200100002002000020037200371110201100991001001000010000000096011172222422197870100001002003820038200382003820038
102042003715000000019719686251010010010000100100005002847521020018200372003718409618733101002001000020020000200372003711102011009910010010000100000000135011172222422197870100001002003820038200382003820038
10204200371550000001560196862510100100100001001000050028475210200182003720037184096187331010020010000200200002003720037111020110099100100100001000000300011172222422197870100001002003820038200382003820038
1020420037150000000197196862510100100100001001000050028475210200182003720037184286187401010020010008200200162003720037111020110099100100100001000000003011171801600198010100001002003820038200382003820038
1020420037150000000061196862510100100100001001000050028475210200182003720037184287187411010020010008200200162003720037111020110099100100100001000000000011171801600198000100001002003820038200382003820038
1020420037150000000061196862510100100100001001000050028475210200182003720037184286187401010020010008200200162003720037111020110099100100100001000000000011171701600198000100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100242003715002511968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752112001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
1002420037155662921968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
100242003715001681968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
1002420037150210611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038
10024200371500611968625100101010000101000050284752102001820037200371844331876710010201000020200002003720037111002110910101000010000640216221978610000102003820038200382003820038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  sri d0, d8, #3
  movi v1.16b, 0
  sri d1, d8, #3
  movi v2.16b, 0
  sri d2, d8, #3
  movi v3.16b, 0
  sri d3, d8, #3
  movi v4.16b, 0
  sri d4, d8, #3
  movi v5.16b, 0
  sri d5, d8, #3
  movi v6.16b, 0
  sri d6, d8, #3
  movi v7.16b, 0
  sri d7, d8, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)03070a1e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6e74scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcficache miss (d3)d5d6ddinst fetch restart (de)e0ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602042009015311010632580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010000111101190116112006201600001002006620066200662006620066
16020420065151110292580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010000111101190116112006201600001002006620066200662006620066
160204200651501107202580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010000111101190116112006201600001002006620066200662006620066
1602042006515011174292580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010000111101190116112006201600001002006620066200662006620066
160204200651551101902580116100800161008002850064019601200442006520065061280128200800282001600562006520130111602011009910010016000010000111101190116112006201600001002006620066200662006620066
160204200651501101592580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010000111101190116112006201600001002006620066200662006620066
16020420065151110292580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010000111101190116112006201600001002006620066200662006620066
16020420065150110942580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010010111101190116112006201600001002006620066200662006620066
160204200651511101172580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010000111101190116112006201600001002006620066200662006620066
16020420065150110522580116100800161008002850064019601200442006520065061280128200800282001600562006520065111602011009910010016000010000111101190116112006201600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)03070a191e3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a7a8a9accfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002420076150300001572780010108000010800005064000011020031200502005032180010208000020160000200502005011160021109101016000010000001004611212434422181920056402160000102006020060200602006020060
16002420059150110014192980010108000010800005064000001520040200592005932180010208000020160000200502005911160021109101016000010000019331004811311534412162120056402160000102006020060200602006020060
1600242005915020000610298001010800001080000506400000152004020059200593218001020800002016000020059200591116002110910101600001000000100403111925422201920056201160000102017020051200602006020051
16002420059156120005642980010108000010800005064000001020040200592005932180010208000020160000200592005911160021109101016000010000001004416721434422131820056402160000102006020060200602006020060
1600242005915011000502980010108000010800005064000000102004020059200593218001020800002016000020059200591116002110910101600001000000100466221834422181820056402160000102006020060200602006020060
16002420059151000003982780010108000010800005064000001102004020059200593218001020800002016000020059200591116002110910101600001000000100436221734422202020056402160000102006020060200602006020060
16002420059151110001192980010108000010800005064000000102004020059200593218001020800002016000020059200591116002110910101600001000300100486721734422191720056402160000102006020051200602006020060
16002420059150110006892980010108000010800005064000000102004020059200593218001020800002016000020059200591116002110910101600001000000100436721834422182020056402160000102006020060200602006020060
160024200591501200156298001010800001080000506400000002004020059200593218001020800002016000020059200591116002110910101600001000100100456722134422211820056201160000102006020060200602006020060
1600242005915121000622980010108000010800005064000001102010520059200593218001020800002016000020059200591116002110910101600001000000100456621334422181820056201160000102005120051200512005120051

Test 5: throughput

Count: 16

Code:

  sri d0, d16, #3
  sri d1, d16, #3
  sri d2, d16, #3
  sri d3, d16, #3
  sri d4, d16, #3
  sri d5, d16, #3
  sri d6, d16, #3
  sri d7, d16, #3
  sri d8, d16, #3
  sri d9, d16, #3
  sri d10, d16, #3
  sri d11, d16, #3
  sri d12, d16, #3
  sri d13, d16, #3
  sri d14, d16, #3
  sri d15, d16, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2503

retire (01)cycle (02)03081e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440060300002925160108100160008100160020500128013204001940038400381997761998916012020016003220032006440038400381116020110099100100160000100001111011801600400351600001004003940039400394003940039
1602044003830002115525160108100160008100160020500128013214001940038400381997761998916012020016003220032006440038400381116020110099100100160000100001111011801600400351600001004003940039400394003940039
16020440038300002925160108100160008100160020500128013214001940038400381997761998916012020016003220032006440038400381116020110099100100160000100001111011801600400351600001004003940039400394003940039
16020440038300002925160108100160008100160020500128013214001940038400381997761998916012020016003220032006440038400381116020110099100100160000100001111011801600400351600001004003940039400394003940039
16020440038300002925160108100160008100160020500128013214001940038400381997761998916012020016003220032006440038400381116020110099100100160000100001111011801600400351600001004003940039400394003940039
16020440038299002925160108100160008100160020500128013204001940038400381997761998916012020016003220032027240038400381116020110099100100160000100001111011801600400351600001004003940039400394024140039
160204400382991127125160108100160389100160020500128328404001940143400381997762004016012020016042520032006440038400381116020110099100100160000100491111011801600400351600001004003940039400394003940039
16020440038300002925160108100160008100160020500128013204001940038400381997761998916012020016003220032006440038400381116020110099100100160000100031111011801600400351600001004003940039400394003940039
16020440038300002925160108100160008100160020500128013204001940038400381997761998916012020016003220032006440038400381116020110099100100160000100001111011801600400351600001004003940039400394003940039
16020440038299002925160108100160008100160020500128013214001940038400381997761998916012020016013620032006440038400381116020110099100100160000100001111011801600400351600001004003940039400394003940039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0307080a18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2c5cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600244005130000000000452516001010160000101600005012800000110400194003840038199963200181600102016000020320000400384003811160021109101016000010000010022133119162117202040035165160000104003940039400394003940039
16002440038300110001200452516001010160000101600005012800001110400194003840038199963200181600102016000020320000400384003811160021109101016000010000010022166121162117151440035165160000104003940039400394003940039
16002440038300000000004525160010101600001016000050128000011104001940038400381999632001816001020160000203200004003840038111600211091010160000100000100221651211622161717400351510160000104003940039400394003940039
16002440038300000000007102516001010160000101600005012800000110400194003840038199963200181600102016000020320000400384003811160021109101016000010000010022135219162115151540035155160000104003940039400394003940039
1600244003830000000000452516001010160000101600005012800001110400194003840038199963200181600102016000020320000400384003811160021109101016000010000010022135117162116192040035165160000104003940039400394003940039
1600244003830000000000512516001010160000101600005012800001110400194003840038199963200181600102016000020320000400384003811160021109101016000010000010022135116162118161440035155160000104003940039400394003940039
16002440038300000000004525160010101600001016000050128000011104001940038400381999632001816001020160000203200004003840038111600211091010160000100000100221351211622171819400351510160000104003940039400394003940039
16002440038300000000004525160010101600001016000050128000001104001940038400381999632001816001020160000203200004003840038111600211091010160000100000100241652191641181919400351510160000104003940039400394003940039
16002440038300000212171679204525160010101600001016000050128000011104001940038400381999632001816001020160000203202644003840038111600211091010160000104000100951352181642191417400353010160000104003940039400394003940039
1600244003830000000000452516001010160000101600005012800001110400194003840038199963200181600102016000020320000400384003811160021109101016000010000010022166119162118161740035165160000104003940039400394003940039