Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SRSHL (vector, 8B)

Test 1: uops

Code:

  srshl v0.8b, v0.8b, v1.8b
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)0308090b18191e1f3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a0a1a6a7a8a9acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372200000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
1004303723000000026325482510001000100039831313018303730372415328951000100020003037303711100110000000709073116112630100030383038303830383038
100430372300000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
10043037231101012006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
100430372200000006125482510001000100039831303018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
100430372300000006125482510001000100039831303018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
100430372300000006125482510001000100039831303018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
100430372300000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
100430372300000006125482510001000100039831313018303730372415328951000100020003037303711100110000000003073116112630100030383038303830383038
1004303722000000061254825100010001000398313030183037303724153289510001000200030373037111001100000000039073116112630100030383038303830383038

Test 2: Latency 1->2

Code:

  srshl v0.8b, v0.8b, v1.8b
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9acc2cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372250000000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010001000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010005000071012511296340100001003008530038300383003830085
102043003722500000006942954849101551361000010010000500427731303001830037300372826972874510466200101672002000030037300371110201100991001001000010003000071011611296340100001003003830038300383003830038
102043003722500000006129548251012010010000100101495004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000000710116112963410100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427867003001830037300372826532876310100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
10204300372320000000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010001000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010001000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010001000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300372110201100991001001000010001000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500001506129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000000300006402162229630010000103003830038300383003830038
100243003722500000012329548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000010000006402162229630010000103003830038300383003830038
10024300372250000006129548251001010100001010000504277313300183003730084282873287671001020100002020000300373003711100211091010100001000010000007232162229630010000103003830038300383003830038
10024300372250000006129548251001010100081010000504277313300183003730037282873287861001020100002020000300373003711100211091010100001020010000006402162329630010000103003830038300383003830038
1002430084225101000612954825100101010000101000050427731330018300373008428292328767100102010000202000030037300371110021109101010000100000016500006402164229630010000103003830038300383003830038
1002430037225100100103295482510010101000010100005042773133001830037300372828732876710010201000020200003008430037111002110910101000010000310900006403242229630010000103003830038300383003830038
100243003722500000061295482510010101000010100005042773133001830037300702828732876710010201000020200003003730037111002110910101000010000330600006402162229630010000103003830038300383003830038
1002430037225000012061295482510010101000010100005042773133001830037300372828732876710010201000020200003003730037111002110910101000010000340300006402162229630010000103003830038300383003830038
100243003722500001206129548251001010100001010000504277313300183003730037282963287671001020100002020322300843003711100211091010100001000040300006402162229630010000103003830086300743003830038
100243003722600000061295482510010101000010100005042773133001830037300372828732876710010201000020200003003730037111002110910101000010000380300006402162229630010000103003830038300383003830038

Test 3: Latency 1->3

Code:

  srshl v0.8b, v1.8b, v0.8b
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722500008700441295482510100100100001001000050042773131300183003730037282727287401010020010008200200163003730037111020110099100100100001000000000111717001600296460100001003003830038300383003830038
10204300372250000180061295482510100100100001001000050042773131300183003730037282726287411010020010008200200163003730037111020110099100100100001000000000111717001600296460100001003003830038300383003830038
1020430037224000060061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001000000000000710011611296340100001003003830038300383008530038
10204300372250000450061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730084111020110099100100100001000000000000710011611296340100001003003830038300383003830038
1020430037224000000061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001000000000000710011611296340100001003003830038300383003830038
1020430037225000000061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001000000000000710011611296340100001003003830038300383003830038
10204300372250000150061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001000000000000710011611296340100001003003830038300383003830038
10204300372240000150061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001000000000000710011611296348100001003003830038300383003830038
10204300372250000150061295482510100104100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001000000000000710011611296340100001003003830038300383003830038
1020430037225000000061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001000000000000710011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9faccfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037225026629548251001010100001010000504277313030018300373003728287328767100102010000202000030037300371110021109101010000100644111691229630010000103003830038300383003830038
10024300372250266295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001006441116121129630010000103003830038300383003830038
10024300372250266295482510010101000010100005042773130300183003730037282873287671001020100002220000300373003711100211091010100001006441216121129630010000103003830038300383003830038
10024300372250266295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001006441116111129630010000103003830038300383003830038
10024300372364352662954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010064491691129630010000103003830038300383003830038
10024300372250266295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001006441116111129630010000103003830038300383003830038
10024300372250266295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001006441116111429774010000103003830038300383003830038
1002430037225026629548251001010100001010000504277313030018300373003728287328767100102010000202000030037300371110021109101010000100644111611929630010000103003830038300383003830038
100243003722502662954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010064411169929630010000103003830038300383003830038
1002430037225026629548251001010100001010000504277313030018300373003728287328767100102010000202000030037300371110021109101010000100644916111129630010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  srshl v0.8b, v8.8b, v9.8b
  srshl v1.8b, v8.8b, v9.8b
  srshl v2.8b, v8.8b, v9.8b
  srshl v3.8b, v8.8b, v9.8b
  srshl v4.8b, v8.8b, v9.8b
  srshl v5.8b, v8.8b, v9.8b
  srshl v6.8b, v8.8b, v9.8b
  srshl v7.8b, v8.8b, v9.8b
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03181e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a6a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8020420060150069412580100100800001008000050064000012002020039200399973399978010020080000200160000200392003911802011009910010080000100220995551105161120036800001002004020040200402009520094
8020420039150104125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000051102163220036800001002004020040200402004020040
8020420039150004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000051101162320036800001002004020040200402004020040
8020420039150004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000051102162320036800001002004020040200402004020040
8020420039150004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000200051102163320036800001002004020040200402004020040
8020420039150004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000051103162320036800001002004020040200402004020040
80204200391500124125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000051102163220036800001002004020040200402004020040
8020420039150004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000051103161220036800001002004020040200402004020040
8020420039150004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000051102162320036800001002004020040200402004020040
8020420039150094125801001008000010080000500640000120020200392003999733999780100200800002001604182003920039118020110099100100800001000000051104162220036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03090b1e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420048150002404025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100005020616442003680000102004020040200402004020040
8002420039150001204025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100005020416762003680000102004020040200402004020040
8002420039150001204025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100005020416642003680000102004020040200402004020091
8002420039150001204025800101080000108000050640000120020200392003999963100198001020800002016000020039200391180021109101080000100005091316472003680000102004020040200402004020040
8002420039150001204025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100005020416672003680000102004020040200402004020040
800242003915000904025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100005020416432008780000102004020040200402004020040
8002420039150002404025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100005020416432003680000102004020040200402004020040
800242003915000904025800101080000108000050640000120020200392003999963100198001020800002016000020039200391180021109101080000100005020316342003680000102004020040200402004020092
8002420039150001204025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100005020916342003680000102004020040200402004020040
80024200391500021604025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100005020316642003680000102004020040200402004020040