Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SRSHR (vector, 4H)

Test 1: uops

Code:

  srshr v0.4h, v0.4h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03181e1f3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372300061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
100430372300061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
100430372200061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
100430372200061254725100010001000398160030183037303724143289510001000100030373037211001100000073116112629100030383038303830383038
100430372200061254725100010001000398160030183037303724143289510001000100030373037111001100010273116112629100030383038303830383038
100430372300061254725100010001000398160030183037303724143289510001000100030373037111001100010073116112629100030383038303830383038
100430372211322061254725100010001000398160030183037308424143289510001000100030373037111001100000073116112629100030383038303830383038
1004303723012061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
100430372300061254725100010001000398160030183037303724143289510001000100030373037111001100003073116112629100030383038303830383038
100430372300061254725100010001000398160130183037303724143289510001000100030373037111001100000073116112629100030383038303830383038

Test 2: Latency 1->2

Code:

  srshr v0.4h, v0.4h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372250612954725101001001000010010000500427716013001803003730037282643287451010020010000200100003003730037111020110099100100100001001007101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716013001803003730037282643287451010020010000200100003003730037111020110099100100100001000007101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716003001803003730037282643287451010020010000200100003003730037111020110099100100100001000007101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716013001803003730037282643287451010020010000200100003003730037111020110099100100100001005007101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716013001803003730037282643287451010020010000200100003003730037111020110099100100100001000007101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716003001803003730037282643287451010020010000200100003003730037111020110099100100100001003307101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716013001803003730037282643287451010020010000200100003003730037111020110099100100100001000007101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716003001803003730037282643287451010020010000200100003003730037111020110099100100100001000007101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716003001803003730037282643287451010020010000200100003003730037111020110099100100100001000007101161129633100001003003830038300383003830038
10204300372250612954725101001001000010010000500427716013001803003730037282643287451010020010000200100003003730037111020210099100100100001000007101161129633100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0308090b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037225000000006129547251001010100001010000504277160030018300373003728286328767100102010000201000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
1002430037225000000006129547251001010100001010000504277160030018300373003728286328767100102010000201000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
1002430037225000000006129547251001010100001010000504277160030018300373003728286328767100102010000201000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
1002430037224000000006129547251001010100001010000504277160030018300373003728286328767100102010000201000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
1002430037225000000006129547251001010100001010000504277160030018300373003728286328767100102010000201000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
1002430037225000000006129547251001010100001010000504277160030018300373003728286328767100102010000201000030037300371110021109101010000100001006402162229629010000103003830038300383003830038
1002430037225000000006129547251001010100001010000504277160030018300373003728286328767100102010000201000030037300371110021109101010000100001006402162229629410000103036030367303213032030320
1002430369227101779246161518929529151100701310064131090072428662403030630371303202829734288781121420109972011192303683041781100211091010100001004331952807874405229883310000103041430272303233037030408
100243022622710057933176061295472510010101000010100005042771600301263003730037282868288041001020100002010000300373003711100211091010100001022001391027063732329890110000103036730367303673035830227
100243041722700177804352061295472510010101000010100005042771600300183003730037282861628825100102010000201000030179303214110021109101010000100000006612162229629010000103003830038300853003830038

Test 3: throughput

Count: 8

Code:

  srshr v0.4h, v8.4h, #3
  srshr v1.4h, v8.4h, #3
  srshr v2.4h, v8.4h, #3
  srshr v3.4h, v8.4h, #3
  srshr v4.4h, v8.4h, #3
  srshr v5.4h, v8.4h, #3
  srshr v6.4h, v8.4h, #3
  srshr v7.4h, v8.4h, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)033f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8acc5branch mispredict (cb)cdcfd6inst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042005815030258010810080008100800205006401321200202003920039997769990801202008003220080032200392003911802011009910010080000100000111511816020036800001002004020040200402004020040
8020420039150302580108100800081008002050064013202002020039200399977699908012020080032200800322003920039118020110099100100800001000030111511816020036800001002004020040200402004020040
802042003915030258010810080008100800205006401320200202003920039997769990801202008003220080032200392003911802011009910010080000100000111511816020036800001002004020040200402004020040
802042003915030258010810080008100800205006401320200202003920039997769990801202008003220080032200392003911802011009910010080000100000111511816020036800001002004020040200402004020040
80204200391505052580108100800081008002050064013212002020039200399977699908012020080032200800322003920039118020110099100100800001000087111511816020036800001002004020040200402004020040
80204200391503025801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000114111511816020036800001002004020040200402004020040
802042009015030258010810080008100800205006401320200202003920039997769990801202008003220080032200392003911802011009910010080000100010111511816020036800001002004020040200402004020040
8020420039150302580108100800081008002050064013202002020039200399977699908012020080032200800322003920039118020110099100100800001000187111511816020036800001002004020040200402004020040
80204200391503025801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000141111511816020036800001002004020040200402004020040
802042003915030258010810080008100800205006401320200202003920039997769990801202008003220080032200392003911802011009910010080000100000111511816020036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03041e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8accfitlb miss (d4)d5d6ddinst fetch restart (de)e0ec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420040151004025800101080000108000050640000200202003920039999631001980010208000020800002003920039118002110910108000010000050211161681720036080000102004020040200402004020040
800242003915010207448001010800001080000506400002002020039200399996310019800102080000208000020039200391180021109101080000102020502111416171420036080000102004020040200402004020040
8002420039151134025800101080000108000060640000200202003920039999631001980115208000020800002008920100118002110910108000010000050211916171420036080000102004020040200402004020040
80024200391501040258001010800001080000506400002002020039200399996310019800102080000208000020039200391180021109101080000100000502111416181420036080000102004020040200402004020040
8002420039150104025800101080000108000050640000200202003920039999631001980010208000020800002003920039118002110910108000010000350211916171020036080000102004020040200402004020040
80024200391501040258001010800001080000506400002002020039200399996310019800102080000208000020039200391180021109101080000100000502111716141720036080000102004020040200402004020040
8002420039150112402580010108000010800005064000020020200392003999963100198001020800002080000200392003911800211091010800001000259502111616171720036080000102004020040200402004020040
80024200391501040258001010800001080000506400002002020039200399996310046800102080000208000020039200391180021109101080000100012050211171691620036080000102004020040200402004020040
80024200391501040258001010800991080000506400002002020039200399996310019800102080000208000020039200391180021109101080000100010502111716151820036080000102004020040200402004020040
80024200391501040258001010800001080000506400002002020039200399996310019800102080000208000020039200391180021109101080000100040502111716161620036080000102004020040200402004020040