Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

ST1 (multiple, post-index, 2 regs, 4H)

Test 1: uops

Code:

  st1 { v0.4h, v1.4h }, [x6], x8
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 0
  mov x8, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 60 nops): 2.000

Issues: 3.000

Integer unit issues: 1.000

Load/store unit issues: 1.000

SIMD/FP unit issues: 1.000

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk instruction (07)mmu table walk data (08)09l2 tlb miss instruction (0a)l2 tlb miss data (0b)181e1f22233a3f464951schedule uop (52)schedule int uop (53)schedule simd uop (54)schedule ldst uop (55)dispatch int uop (56)dispatch simd uop (57)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)ldst uops in schedulers (5b)5f60696d6emap rewind (75)map stall (76)dispatch uop (78)map ldst uop (7d)map simd uop (7e)map ldst uop inputs (80)map simd uop inputs (81)8283flush restart other nonspec (84)85inst all (8c)inst simd store (99)inst ldst (9b)l1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafb5bcl1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2c9cfd0d2l1i cache miss demand (d3)l1i tlb miss demand (d4)d5map dispatch bubble (d6)d9dadbddfetch restart (de)e0? int output thing (e9)eaebec? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
620062880523201700140000004654286020117661300010001000100010001000100050001090480001502168328570287803103000100010003000200028728286231161001100010001002000100000010000030001334192806938310453820112319438111445472828410001540512748138551000100010002865328721287892872828784
6200428602231018001700010046402877011176643000100010001000100010001000500010901800018021671284552863631030001000100030002000287052863411610011000100010022411002011100101410013266949668933109124720172321438061043412833010001557912701136081000100010002868328678287892875328717
62004287862310150090001004673287071017711300010001000100010001000100050001089980001602169528570287983103000100010003000200028644287321161001100010001000030100010910000030001299895526976316773820046329238061640422834910001550812705136601000100010002866828842287832868828834
62004288392311800171001004706286641117702300010001000100010001000100050001090880001702169128636287713103000100010003000200028829287561161001100010001000000100000010000000001325295306891315184320117324238141342442828110001568213001136761000100010002879128766288532882728751
620042860023001400130001004630287341117819300010001000100010001000100050001090480001802167628572287503103000100010003000200028609287421161001100010001000000100000310000030001323996536899323874420207320838131239362836310001584012845137251000100010002871428856288622882928733
62004285922300180019000000486628561101769530001000100010001000100010005000109038000120217942846528697310300010001000300020002870028660116100110001000100224110010121001024121141342496886905312044220057331238151544402829110001542212652139361000100010002881428748287182873628775
620042880723111100131002104782287781117768300010001000100010001000100050001091580001202165128494287513103000100010003000200028896289391161001100010001000000100000010000000001293193136899310674120358324838111339402828610001578812901140231000100010002902428875289302884028859
6200429020232020001900010046282880510180093000100010011000100010001000500010909800013021724286902910031030001000100030002000286802869111610011000100010000001000103100000300931326994436946309044119936320638121446402831110001564812566138141000100010002880828844288032887928654
620042875823101600150061004725286061017816300010001000100010001000100050001090680001302171628533288513103000100010003000200028749288101161001100010001000030100010010000000001314994566937317494120145324738151941392816910001592512860137371000100010002880528850287632874928742
620042873223101400140000104720285931017817300010001000100010001000100050001090480001202175728554287663103000100010003000200028778286581161001100010001000000100000010000030001321694376946313774320172314138181747382833310001557912670141541000100010002877428774287132872028834

Test 2: throughput

Count: 8

Code:

  st1 { v0.4h, v1.4h }, [x6], x8
  st1 { v0.4h, v1.4h }, [x6], x8
  st1 { v0.4h, v1.4h }, [x6], x8
  st1 { v0.4h, v1.4h }, [x6], x8
  st1 { v0.4h, v1.4h }, [x6], x8
  st1 { v0.4h, v1.4h }, [x6], x8
  st1 { v0.4h, v1.4h }, [x6], x8
  st1 { v0.4h, v1.4h }, [x6], x8
  mov x7, x6
  mov x8, x6
  mov x9, x6
  mov x10, x6
  mov x11, x6
  mov x12, x6
  mov x13, x6
  mov x8, 0

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 1.0005

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)l2 tlb miss data (0b)18191e1f222324373a3f46494f51schedule uop (52)schedule int uop (53)schedule simd uop (54)schedule ldst uop (55)dispatch int uop (56)dispatch simd uop (57)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)ldst uops in schedulers (5b)696d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map simd uop (7e)map int uop inputs (7f)map ldst uop inputs (80)map simd uop inputs (81)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int alu (97)inst simd store (99)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbcl1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2branch cond mispred nonspec (c5)cdcfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
1602068004062100000356435610034100800258875252411358010080099800008010080000800004359014375884864437180015800408004059924359998240100200800008000020024000016000080040800401180201100991001008000080000010080000017008000110280001017000051101161180140800008000080000801008004180041800418004180041
16020480040620000000300042230800250812524613980100808038000080100800008000043590143758848653618800158004080040599243599982401002008000080000200240000160000800408004011802011009910010080000800000100800600000800010028000110000051101161180037800008000080000801008004180041800418004180041
160204800406211000001210020511800251111225240259801008205080000801008000080000435899037588486464538001580040800405992435999824010020080000800002002400001600008004080040118020110099100100800008000001008000000008000100109080001117000051101161180037800008000080000801008004180041800418004180041
16020480040620000001830001221800259111252417308010082687800008010080000800004359014375884864615180015800408004059924359998240100200800008000020024000016000080040801641180201100991001008000080000010080008725018000800880001825700051101161180037800008000080000801008004180041800418004180041
1602048004062000000000104221080025082252415778010081035800008010080000800004359014376294064039780015800408004059924359998240100200800008000020024000016000080040800401180201100991001008000080000010080000017008000120180001117000051101161180037800008000080000801008004180041800418004180041
160204800406200000002010222608002588225242477801008108080000801008000080000435901437588486434838001580040800405992435999824010020080120800002002400001600008004080040118020110099100100800008000001008000001900800010010678000110000051101161180037800008000080000801008004180041800418004180041
1602048004062000000040002179080025882252461398019080802800008010080000800004359014375884864614780015800408004059924359998240100200800008000020024000016000080040800402180201100991001008000080000010080007725018000700880001025710051101161180037800008000080000801008004180041800418004180041
1602048004062000000030101790801308802524185080100810358000080100800008010843590143758848643483800158004080040599853599982401002008000080000200240000160000800408004011802011009910010080000800000100800078250180008011180001825710051281161180037800008000080000801008004180041800418004180041
16020480040620111000901042420800258802524158280100814808000080100800008000043590143758848640366800158004080040599241560080240100200800008000020024000016000080040800401180201100991001008000080000010080062017008000100280001117000051101161180037800008000080000801008004180041800418004180041
1602048004062100000020001160080025883252415698010080159800008010080000800004359014375884864348480015800408004059924359998240100200800008000020024000016000080040800401180201100991001008000080000010080000018008000100280001117000051101161180037800008000080000801008004180041800418004180041

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 1.0005

retire uop (01)cycle (02)03mmu table walk data (08)09l2 tlb miss data (0b)18191e1f22373a3f46494f51schedule uop (52)schedule int uop (53)schedule simd uop (54)schedule ldst uop (55)dispatch int uop (56)dispatch simd uop (57)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)ldst uops in schedulers (5b)60696b6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map simd uop (7e)map int uop inputs (7f)map ldst uop inputs (80)map simd uop inputs (81)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int alu (97)inst simd store (99)inst ldst (9b)9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbcl1d cache miss st nonspec (c0)c2cfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)ea? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
160026800406200000004037600800258812524533080010806928000080010800008000043584293758848643450080015080040800405994636002024001020800008000020240000160000800408004011800211091010800008000010800000170080000001800010170502041645800378000008000080000800108004180041800418004180041
1600248004062100000020580080025883252427428001081148800008001080000800004358417375884864209108001508004080040599463600202400102080000800002024000016000080040800401180021109101080000800001080000000080000105800011170502051646800378000008000080000800108004180041800418004180041
16002480040620000000309240800258832524470780010846978000080010800008000043584293758848651370080015080040800405994636002024001020800008000020240000160000800408004011800211091010800008000010800000170080001001800001170502041644800378000008000080000800108004180041800418004180041
1600248004062000000030100800258832524470480010800108000080010800008000043584293758848644146080015080040800405994636002024001020800008000020240000160000800408004011800211091010800008000010800000170080001002800011170502031666800378000008000080000800108004180041800418004180041
1600248004062000000000469408002588125244706800108469480120802428011680000435842937588486458351800150800408004059946360020240010208000080000202400001600008004080040118002110910108000080000108000001700800010078000111705020816115800378000008000080000800108004180041800418004180041
16002480040621000000204694080025801252456428001085630800008001080000800004358429375884864004508001508004080040599463600202400102080000800002024000016000080040800401180021109101080000800001080000000080000003800011170502041643800378000008000080000800108004180041800418004180041
160024800406210000000058008002588025244703800108469480000800108000080000435842937588486441400800150800408004059946360020240010208000080000202400001600008004080040118002110910108000080000108000000008000010380001100502051654800378000008000080000800108004180041800418004180041
1600248004062100000631469408002508025241158800108469680000800108000080000435842937588486424330800150800408004059946360020240010208000080000202400001600008004080040118002110910108000080000108000000008000100180001017050201031353800378000008000080000800108004180041800418004180041
1600248004062000000021115508002508125244706800108375780000800108000080000435842937588486540950800150800408004059946360020240010208000080000202400001600008004080040118002110910108000080000108000000008000100280001100502041645800378000008000080000800108004180041800418004180041
160024800406200000003011500800258002524470480103814628000080010800008000043584293758848654085080015080040800405994636002024001020800008000020240000160000800408004011800211091010800008000010800000170080001002800000170502031645800378000008000080000800108004180041800418004180041