Apple Microarchitecture Research by Dougall Johnson M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions M1/A14 E-core (Icestorm): Overview | Base Instructions | SIMD and FP Instructions
Code:
st1 { v0.8b, v1.8b }, [x6], x8 nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
mov x0, 0 mov x8, 0
(no loop instructions)
Retires (minus 60 nops): 2.000
Issues: 3.000
Integer unit issues: 1.000
Load/store unit issues: 1.000
SIMD/FP unit issues: 1.000
retire uop (01) | cycle (02) | 03 | mmu table walk instruction (07) | mmu table walk data (08) | l2 tlb miss instruction (0a) | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 22 | 24 | 3a | 3f | 46 | 49 | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 5f | 69 | 6d | 6e | map rewind (75) | map stall (76) | dispatch uop (78) | map ldst uop (7d) | map simd uop (7e) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst simd store (99) | inst ldst (9b) | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | l1d cache miss st nonspec (c0) | c2 | c3 | c9 | cf | d0 | d2 | l1i cache miss demand (d3) | l1i tlb miss demand (d4) | d5 | map dispatch bubble (d6) | d9 | da | db | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
62006 | 28909 | 233 | 27 | 0 | 22 | 0 | 0 | 0 | 12 | 0 | 1 | 0 | 4787 | 28799 | 0 | 1 | 18026 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10908 | 8000 | 3 | 21729 | 28820 | 29095 | 3 | 10 | 3006 | 1001 | 1000 | 3000 | 2000 | 28945 | 29009 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 3 | 1000 | 1 | 0 | 3 | 1000 | 3 | 0 | 0 | 0 | 13036 | 9426 | 6900 | 3162 | 12 | 64 | 20408 | 3262 | 3832 | 20 | 53 | 57 | 28496 | 1000 | 16113 | 13087 | 13917 | 1000 | 1000 | 1000 | 29089 | 29074 | 29005 | 29082 | 29111 |
62004 | 28951 | 234 | 16 | 0 | 28 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 4660 | 28888 | 0 | 1 | 18064 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10909 | 8000 | 5 | 21687 | 28809 | 29180 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 29052 | 29032 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 0 | 1000 | 3 | 0 | 0 | 0 | 13059 | 9394 | 6923 | 3164 | 11 | 52 | 21404 | 3256 | 3836 | 22 | 56 | 55 | 28452 | 1000 | 16016 | 12907 | 14061 | 1000 | 1000 | 1000 | 29165 | 29056 | 29058 | 29052 | 29070 |
62004 | 29054 | 232 | 20 | 0 | 18 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 4627 | 28951 | 0 | 1 | 18032 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10906 | 8000 | 0 | 21738 | 28705 | 28984 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 29065 | 28857 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 3 | 0 | 1000 | 0 | 0 | 220 | 1000 | 3 | 0 | 0 | 0 | 13170 | 9295 | 6878 | 3057 | 11 | 61 | 20369 | 3260 | 3834 | 13 | 60 | 64 | 28387 | 1000 | 16050 | 12899 | 14030 | 1000 | 1000 | 1000 | 28897 | 29019 | 29103 | 29125 | 28989 |
62004 | 28999 | 232 | 20 | 0 | 20 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 4619 | 28767 | 1 | 1 | 17897 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10903 | 8000 | 7 | 21733 | 28622 | 28841 | 3 | 10 | 3000 | 1000 | 1001 | 3000 | 2000 | 28912 | 28907 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 3 | 0 | 1000 | 0 | 0 | 3 | 1000 | 3 | 0 | 0 | 0 | 13066 | 9367 | 6915 | 3080 | 13 | 63 | 20314 | 3219 | 3825 | 17 | 52 | 55 | 28422 | 1000 | 15900 | 12790 | 14083 | 1000 | 1000 | 1000 | 28933 | 28943 | 28894 | 29008 | 28955 |
62004 | 28925 | 232 | 21 | 0 | 26 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 4692 | 28701 | 0 | 1 | 17838 | 3000 | 1001 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10903 | 8000 | 5 | 21730 | 28698 | 28864 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28876 | 28822 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 0 | 1000 | 2 | 0 | 0 | 0 | 13137 | 9386 | 6817 | 3132 | 14 | 58 | 20210 | 3267 | 3829 | 20 | 60 | 59 | 28332 | 1000 | 15506 | 12914 | 13849 | 1000 | 1000 | 1000 | 28999 | 28907 | 28970 | 28928 | 28968 |
62004 | 28852 | 232 | 22 | 0 | 25 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 4792 | 28731 | 1 | 1 | 17858 | 3000 | 1000 | 1001 | 1000 | 1000 | 1000 | 1000 | 5000 | 10905 | 8000 | 2 | 21722 | 28682 | 28982 | 3 | 10 | 3003 | 1000 | 1000 | 3000 | 2000 | 28767 | 28854 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 3 | 2 | 1000 | 0 | 0 | 0 | 1000 | 3 | 0 | 0 | 0 | 13163 | 9405 | 6934 | 3184 | 17 | 56 | 20221 | 3195 | 3828 | 20 | 54 | 56 | 28474 | 1000 | 16142 | 12805 | 14157 | 1000 | 1000 | 1000 | 28811 | 28950 | 28914 | 28899 | 28869 |
62004 | 28964 | 231 | 18 | 0 | 25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 4834 | 28746 | 1 | 1 | 17948 | 3000 | 1000 | 1000 | 1001 | 1000 | 1000 | 1000 | 5000 | 10906 | 8000 | 6 | 21673 | 28657 | 28948 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28911 | 28862 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 3 | 0 | 1000 | 0 | 0 | 0 | 1000 | 3 | 0 | 0 | 0 | 13116 | 9451 | 6886 | 3182 | 16 | 58 | 20315 | 3233 | 3829 | 18 | 58 | 55 | 28290 | 1000 | 15780 | 12784 | 14054 | 1000 | 1000 | 1000 | 28892 | 28824 | 28865 | 28921 | 28880 |
62004 | 28940 | 232 | 25 | 0 | 22 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 4745 | 28740 | 0 | 1 | 17793 | 3000 | 1001 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10907 | 8000 | 5 | 21702 | 28688 | 28910 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28849 | 28885 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 0 | 1000 | 3 | 0 | 0 | 0 | 13103 | 9449 | 6839 | 3077 | 17 | 56 | 20279 | 3193 | 3829 | 22 | 58 | 62 | 28357 | 1000 | 15801 | 12585 | 13742 | 1000 | 1000 | 1000 | 28841 | 28924 | 28974 | 28967 | 28928 |
62004 | 28888 | 232 | 18 | 0 | 21 | 0 | 0 | 0 | 18 | 1 | 1 | 0 | 4781 | 28635 | 0 | 1 | 17863 | 3003 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10905 | 8000 | 2 | 21727 | 28599 | 29004 | 3 | 27 | 3000 | 1000 | 1000 | 3000 | 2000 | 28825 | 28898 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 0 | 1000 | 2 | 0 | 0 | 0 | 13086 | 9200 | 6942 | 3095 | 17 | 58 | 20191 | 3210 | 3829 | 25 | 57 | 58 | 28428 | 1000 | 15872 | 12742 | 14064 | 1000 | 1000 | 1000 | 28897 | 28954 | 29086 | 28941 | 28973 |
62004 | 28786 | 232 | 16 | 0 | 22 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 4690 | 28904 | 0 | 0 | 17915 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10900 | 8000 | 5 | 21749 | 28690 | 28904 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28809 | 28857 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 0 | 1000 | 2 | 0 | 0 | 0 | 13010 | 9156 | 6934 | 3172 | 12 | 62 | 20126 | 3246 | 3829 | 22 | 58 | 54 | 28344 | 1000 | 15566 | 12650 | 13804 | 1000 | 1000 | 1000 | 28872 | 28795 | 28794 | 28742 | 28847 |
Count: 8
Code:
st1 { v0.8b, v1.8b }, [x6], x8 st1 { v0.8b, v1.8b }, [x6], x8 st1 { v0.8b, v1.8b }, [x6], x8 st1 { v0.8b, v1.8b }, [x6], x8 st1 { v0.8b, v1.8b }, [x6], x8 st1 { v0.8b, v1.8b }, [x6], x8 st1 { v0.8b, v1.8b }, [x6], x8 st1 { v0.8b, v1.8b }, [x6], x8
mov x7, x6 mov x8, x6 mov x9, x6 mov x10, x6 mov x11, x6 mov x12, x6 mov x13, x6 mov x8, 0
(fused SUBS/B.cc loop)
Result (median cycles for code divided by count): 1.0005
retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 22 | 23 | 24 | 37 | 3a | 3f | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 60 | 69 | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | 77 | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map simd uop (7e) | map int uop inputs (7f) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | 91 | inst branch cond (94) | inst int alu (97) | inst simd store (99) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
160206 | 80040 | 642 | 1 | 1 | 0 | 0 | 0 | 0 | 9 | 0 | 0 | 0 | 2530 | 1 | 80025 | 9 | 8 | 2 | 25 | 242149 | 80100 | 85163 | 80000 | 80100 | 80000 | 80000 | 4358990 | 3758848 | 655525 | 0 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80007 | 7 | 29 | 0 | 0 | 80008 | 0 | 0 | 11 | 80001 | 8 | 29 | 7 | 0 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 642 | 1 | 0 | 1 | 0 | 0 | 0 | 9 | 0 | 0 | 0 | 2051 | 1 | 80025 | 8 | 9 | 2 | 25 | 240271 | 80100 | 82052 | 80000 | 80216 | 80000 | 80000 | 4358994 | 3758848 | 655415 | 0 | 80015 | 80159 | 80040 | 59924 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80007 | 8 | 0 | 0 | 0 | 80008 | 0 | 0 | 14 | 80001 | 8 | 29 | 7 | 0 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 643 | 1 | 0 | 0 | 0 | 0 | 0 | 9 | 0 | 0 | 0 | 2048 | 1 | 80025 | 9 | 9 | 1 | 25 | 245269 | 80100 | 80101 | 80000 | 80100 | 80000 | 80000 | 4358990 | 3758848 | 641396 | 0 | 80015 | 80040 | 80040 | 59987 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80007 | 7 | 0 | 0 | 0 | 80007 | 1 | 1 | 8 | 80000 | 8 | 29 | 7 | 0 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 644 | 1 | 0 | 1 | 0 | 0 | 0 | 7 | 0 | 0 | 0 | 144 | 1 | 80025 | 9 | 9 | 2 | 25 | 246086 | 80100 | 80123 | 80000 | 80100 | 80000 | 80000 | 4358994 | 3758848 | 652764 | 0 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160256 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80007 | 7 | 29 | 0 | 0 | 80008 | 0 | 0 | 11 | 80001 | 8 | 29 | 7 | 0 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80161 | 80041 | 80041 | 80041 |
160204 | 80040 | 643 | 1 | 1 | 0 | 0 | 0 | 0 | 9 | 0 | 0 | 0 | 3056 | 1 | 80025 | 9 | 0 | 3 | 25 | 246128 | 80100 | 81223 | 80000 | 80100 | 80000 | 80000 | 4358994 | 3758848 | 652896 | 0 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 0 | 240100 | 200 | 80120 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80008 | 8 | 29 | 0 | 0 | 80008 | 2 | 0 | 1056 | 80001 | 8 | 29 | 7 | 1 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80163 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 643 | 1 | 0 | 1 | 0 | 0 | 36 | 12 | 0 | 0 | 0 | 1829 | 1 | 80025 | 8 | 9 | 2 | 54 | 242654 | 80100 | 80161 | 80000 | 80100 | 80000 | 80000 | 4358994 | 3762940 | 655598 | 0 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80008 | 8 | 29 | 0 | 0 | 80008 | 0 | 2 | 14 | 80001 | 8 | 29 | 7 | 0 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80092 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80161 | 643 | 1 | 1 | 0 | 0 | 1 | 0 | 12 | 0 | 0 | 0 | 2419 | 1 | 80025 | 9 | 0 | 2 | 25 | 243150 | 80100 | 84312 | 80000 | 80100 | 80000 | 80000 | 4358994 | 3758848 | 640483 | 0 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80007 | 7 | 29 | 0 | 0 | 80008 | 0 | 0 | 14 | 80001 | 8 | 0 | 7 | 0 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 642 | 1 | 1 | 1 | 0 | 0 | 0 | 7 | 0 | 0 | 0 | 3050 | 1 | 80025 | 9 | 9 | 5 | 53 | 240222 | 80100 | 80161 | 80000 | 80100 | 80000 | 80000 | 4359002 | 3758848 | 646524 | 0 | 80119 | 80040 | 80040 | 59924 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240360 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80008 | 8 | 29 | 0 | 1 | 80008 | 0 | 0 | 8 | 80000 | 8 | 29 | 7 | 0 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 642 | 1 | 0 | 0 | 0 | 0 | 0 | 9 | 0 | 0 | 0 | 4257 | 1 | 80025 | 9 | 9 | 1 | 25 | 240192 | 80100 | 82530 | 80000 | 80100 | 80000 | 80000 | 4361246 | 3758848 | 647680 | 0 | 80015 | 80040 | 80040 | 59985 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80008 | 9 | 29 | 0 | 0 | 80008 | 0 | 1 | 8 | 80001 | 8 | 29 | 7 | 1 | 5128 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80161 |
160204 | 80040 | 643 | 1 | 0 | 0 | 0 | 0 | 12 | 9 | 0 | 0 | 0 | 2169 | 1 | 80025 | 9 | 9 | 2 | 25 | 245257 | 80100 | 84311 | 80000 | 80100 | 80000 | 80000 | 4358990 | 3758848 | 649245 | 0 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 0 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 0 | 100 | 100 | 80000 | 80000 | 100 | 80009 | 8 | 0 | 603 | 0 | 81448 | 0 | 8 | 7 | 80001 | 8 | 0 | 7 | 1 | 5110 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
Result (median cycles for code divided by count): 1.0005
retire uop (01) | cycle (02) | 03 | mmu table walk data (08) | 09 | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 23 | 37 | 3a | 3f | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 60 | 61 | 69 | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map simd uop (7e) | map int uop inputs (7f) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int alu (97) | inst simd store (99) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | bc | l1d cache miss st nonspec (c0) | c2 | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
160026 | 87379 | 677 | 0 | 0 | 0 | 0 | 0 | 21 | 3 | 0 | 1148 | 0 | 80025 | 0 | 8 | 0 | 25 | 240020 | 80010 | 80463 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 645835 | 0 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 0 | 0 | 0 | 80001 | 0 | 0 | 1 | 80001 | 1 | 0 | 0 | 5020 | 2 | 16 | 2 | 2 | 80037 | 80000 | 0 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 643 | 0 | 0 | 0 | 0 | 0 | 6 | 4 | 0 | 9 | 0 | 80025 | 8 | 8 | 0 | 25 | 240473 | 80101 | 83755 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 640050 | 1 | 5 | 80015 | 80040 | 80040 | 60018 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 21 | 0 | 0 | 80001 | 0 | 0 | 0 | 80001 | 1 | 21 | 0 | 5020 | 2 | 16 | 3 | 2 | 80037 | 80000 | 0 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 599 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 | 4696 | 0 | 80025 | 8 | 8 | 1 | 25 | 240590 | 80010 | 80007 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 643450 | 0 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 21 | 0 | 0 | 80001 | 0 | 0 | 3 | 80001 | 1 | 21 | 0 | 5020 | 2 | 16 | 2 | 2 | 80037 | 80000 | 0 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 599 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 | 580 | 0 | 80025 | 0 | 8 | 3 | 25 | 240587 | 80010 | 80010 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 640045 | 0 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 2 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 18 | 0 | 0 | 80001 | 1 | 0 | 2 | 80001 | 1 | 17 | 0 | 5020 | 3 | 16 | 2 | 3 | 80037 | 80000 | 0 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 652 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 | 4694 | 0 | 80025 | 0 | 8 | 1 | 25 | 241955 | 80010 | 83757 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 642090 | 0 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 17 | 0 | 0 | 80001 | 0 | 0 | 2 | 80001 | 1 | 17 | 0 | 5020 | 2 | 16 | 2 | 2 | 80037 | 80000 | 0 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 621 | 0 | 0 | 0 | 0 | 0 | 12 | 3 | 0 | 9 | 0 | 80025 | 8 | 8 | 1 | 25 | 245641 | 80010 | 84694 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 642090 | 0 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 17 | 0 | 0 | 80001 | 0 | 0 | 17 | 80001 | 1 | 23 | 0 | 5020 | 2 | 16 | 3 | 3 | 80246 | 80000 | 0 | 0 | 80000 | 80000 | 80010 | 80041 | 80286 | 80041 | 80162 | 80041 |
160024 | 82336 | 642 | 0 | 0 | 0 | 1 | 0 | 12 | 2 | 0 | 37 | 0 | 80025 | 8 | 8 | 1 | 25 | 242623 | 80010 | 81150 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 640057 | 0 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 0 | 0 | 0 | 80001 | 0 | 0 | 3 | 80001 | 1 | 21 | 0 | 5020 | 3 | 16 | 2 | 2 | 80037 | 80000 | 0 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 | 13 | 0 | 80025 | 8 | 8 | 0 | 25 | 240707 | 80010 | 80008 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 654084 | 0 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 21 | 0 | 0 | 80000 | 0 | 0 | 6 | 80001 | 1 | 21 | 0 | 5038 | 2 | 16 | 2 | 2 | 80037 | 80092 | 0 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
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