Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

ST1 (multiple, post-index, 3 regs, 1D)

Test 1: uops

Code:

  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 0
  mov x8, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 60 nops): 3.000

Issues: 4.000

Integer unit issues: 1.000

Load/store unit issues: 2.000

SIMD/FP unit issues: 1.000

retire uop (01)cycle (02)03mmu table walk instruction (07)mmu table walk data (08)09l2 tlb miss instruction (0a)l2 tlb miss data (0b)18191e1f23243a3f46495051schedule uop (52)schedule int uop (53)schedule simd uop (54)schedule ldst uop (55)dispatch int uop (56)dispatch simd uop (57)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)ldst uops in schedulers (5b)5f696d6emap rewind (75)map stall (76)dispatch uop (78)map ldst uop (7d)map simd uop (7e)map ldst uop inputs (80)map simd uop inputs (81)8283flush restart other nonspec (84)85inst all (8c)91inst simd store (99)inst ldst (9b)l1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbcl1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2c9cfd0d2l1i cache miss demand (d3)l1i tlb miss demand (d4)d5map dispatch bubble (d6)d9dadbddfetch restart (de)e0? int output thing (e9)eaebec? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
6300628895233310022000040047512880531018031400010011000200010001000200050001590780001721639288262911731040002000100050002000289712900511610010100010002000060200000020002621013008925768713080106720838334338121663652850510001588112916141492000100010002919329153290412904629130
63004292552332500181000100459829244000187614000100010002000100010002000500015903800052174529148294283104000200010005000200029276292961161001010001000200000020000022000060001319494086924318585620838324538141460552869410001620513345143622000100010002942629439294192951929401
630042942123621002700001014665292380001862440001000100020001000100020005000159138000821703291112957931040002000100050002000295712938511610010100010002000000200000220000600013213945868723157135920689336338031259592879810001619613244144782000100010002948429460294562950429354
630042943323522102600012000468229348000182204000100010002000100010002000500015911800082169329011295433104000200010005000200029337292871161001010001000200000020000018820000000013117937468943132116020701317738101764622863910001593713235146692000100010002949529481295982948729449
63004292922362400220000100466029196100183994000100010002000100010002000500015905800052173429139292913104000200210005000200029324292661161001010001000200006020001016720000400013215952169243129136020803324538121762612869010001629013275143542000100010002938529425295312942329393
63004293832362400280000000472829140010184014000100010002000100010002000500015905800052164929149293993104000200010015000200029783295102161001010001000200004020001016120000400013006935568733126136221094332238061263652881910001648713464146022000100010002933829302293942923329464
630042932923526003000001004716291550201838840001000100020001000100020005000159058000122170428998293503104000200010005000200029316293101161001010001000200006020000022000060001308192866874310815592071431873812957562853610001614913288143512000100010002936429260293542936029322
6300429190228230022000000045632918920018369400010001000200010001000200050001591280001521658289752935731040002000100050002000294112930211610010100010002000000200000520000000013063917568193079115920593321638111157632865610001629213355142552000100010002927429449294042930429368
630042930622826012300000004566292120001844840001000100020001000100020005000159038000721737289842930431040002000100050002000292042920011610010100010002014000200000020000000013114937769033082105520871315838111857582864010001592813159148222000100010002931229258293982933729266
6300429392228260028000000045982910100018264400010001000200010001000200050001590780001321655289322932331040002000100050002000293372926211610010100010002000040200000020000600013222927669383113126220654315838071164612864210001617513308143572000100010002938129386293352935029281

Test 2: throughput

Count: 8

Code:

  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  st1 { v0.1d, v1.1d, v2.1d }, [x6], x8
  mov x7, x6
  mov x8, x6
  mov x9, x6
  mov x10, x6
  mov x11, x6
  mov x12, x6
  mov x13, x6
  mov x8, 0

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 1.0005

retire uop (01)cycle (02)03mmu table walk data (08)l2 tlb miss data (0b)18191e1f222324373a3f46494f51schedule uop (52)schedule int uop (53)schedule simd uop (54)schedule ldst uop (55)dispatch int uop (56)dispatch simd uop (57)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)ldst uops in schedulers (5b)60696d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map simd uop (7e)map int uop inputs (7f)map ldst uop inputs (80)map simd uop inputs (81)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int alu (97)inst simd store (99)inst ldst (9b)9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbcl1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)ea? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
240206800436200000301002808002816160253205418010080659160000801008000016000018302863679541640081080018803898004249965350016320100200160000800002004000001600008004080040118020110099100100800008000010016000003600160000002160002234005110116118004080000016000080000801008004180041800448004380043
2402048004262000000300041080028161602532013480100800441600008010080000160000183028636795416400990800188004080042499633500013201002001600008000020040000016000080043800401180201100991001008000080000100160000000016000200816000220005110116118003780000016000080000801008004180041800448004480054
2402048004862100001290001908012616160253201328010080011160000801008000016000018302863679541640068080018800408004049956350001320100200160000800002004000001600008004280042118020110099100100800008000010016000023400160000002160000034005110116118004080000016000080000801008005080041800448004380043
24020480040620000063000310800281600253209338010080833160000801008000016000013706923679829642146080018800488005049956350000320100200160000800002004000001600008004980049118020110099100100800008000010016000003400160002002160002234025110116118003980000016000080000801008004180044800418005180041
240204800406200000213000340800280160253201428010080024160000801008000016000018302863679541640051080023800438004349963350000320100200160000800002004000001600008004280040118020110099100100800008000010016000003400160000609160002234005110116118004780000016000080000801008004980043800438005180041
240204800436200000000002208002516163253201288010080019160000801008000016000018302863679541640100080018800408004049962350000320100200160000800002004000001600008004280042118020110099100100800008000010016000003400160002002160002234005110116118003780000016000080000801008004180041800418004380043
24020480042621000003000240800281616325320125801008002916000080100800001600001830286367954164008408002580040800424995634999832010020016000080000200400000160000800438004311802011009910010080000800001001600000000160000008160002034005110116118004080000016000080000801008004480041800518004380043
24020480042621000003010280800341600253201318010080020160060801008000016000018302863679541640038080025800438004349956350000320100200160000800002004000001600008004280042118020110099100100800008000010016000003400160002102160002234005110116118003980235016000080000801008005180043800438005180044
2402048004362000000600021080027000253201398010080012160000801008000016000018302863679853642023080018800438004349956350000320100200160000800002004000001600008005080050118020110099100100800008000010016000003400160002000160002034005110116118003980000016000080000801008004380041800448004180050
24020480040621000000010220800251616025320147801808000916000080100800591600001830286367954164051708001880040800494995635013232010020016000080000200400000160000800438020511802011009910010080000800001001600000000160062103160062034005124116118004080000016000080000801008004180041802108004480041

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 1.0005

retire uop (01)cycle (02)03mmu table walk data (08)09l2 tlb miss data (0b)18191e1f2223373f46494f51schedule uop (52)schedule int uop (53)schedule simd uop (54)schedule ldst uop (55)dispatch int uop (56)dispatch simd uop (57)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)ldst uops in schedulers (5b)6061696d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map simd uop (7e)map int uop inputs (7f)map ldst uop inputs (80)map simd uop inputs (81)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)91inst branch cond (94)inst int alu (97)inst simd store (99)inst ldst (9b)9e9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9abacafbcl1d cache miss st nonspec (c0)c2cdcfd0d2d5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)? ldst retires (ed)? simd retires (ee)? int retires (ef)f5f6f7f8fd
24002680040620000000300480028161602532001480010800051600008001080000160000182976936795416400070080018800438004249978350034320010201600008000020400000160000800428005411800211090101080000800000101600000420016000200021101600020420050200011621800408000016000080000800108004180209800448004380043
240024800436210000003004800281616025320012800108000116000080010800001600001830820367954164001100800188004280043499783500233200102016000080000204000001600008004380042118002110901010800008000001016000004265016000000001600022420050200011611800408000016000080000800108004480041800438004480041
24002480043620000000300380028161602532019580010800021600008001080000160000182976936795416400300080018800438004249979350023320010201600008000020400000160000802048004511800211090101080000800000101600000420016000200051600022440050200011611800408000016000080000800108004480044800448004480161
240024800436200000012300180028161602532001580010800021600008001080000160000182976936795416400270080018800428004249978350020320010201600008000020400000160000800438004311800211090101080000800000101600000444016000010021600022420050200011611800408000016000080000800108004380044800448004480044
240024800406200000004004800250002532001080010800021600008007080000160000182976936795416400040080018800438020649978350022320010201600008000020400000160000800408004311800211090101080000800000101600000420016000210021600022420050200011611800378000016000080000800108004180041800418004180041
2400248020662100000123001800270002532001480010800031600008001080000160000182976936795416400200080018800408004249978350020320010201600008000020400000160000800408006211800211090101080000800000101600000480016000210021600022420050200011611800378000016000080000800108004180041800418004180044
2400248004062000000030038002501612532001280010800041600008001080059160000182976936795416400060080018800408004049978350020320010201600008000020400000160000800408004311800211090101080000800000101600000420016000210021600022420050200011611800408000016000080000800108004480044800438004480044
2400248004362000000030008002516160253200148001080005160000800108000016000018297693679541640008008001980042800434997835002332001020160000800002040000016000080043800431180021109010108000080000010160000000016000000021600022420050200011611800408000016000080000800108004380044800448004480044
24002480043621000001230038002716002532001280010800031600008006880000160000182976936795416400080080018800428021149978350020320010201600008000020400000160000800438004511800211090101080000800000101600000420016000200021600022420054610011611800398000016000080000800108004180041800448004180043
240024800436200000003002800280010825320012800108000516000080010800001600001829769367954164000700800188004080040499783500233200102016000080000204003071600008004080043118002110901010800008000001016000000001600020005160002000050200011611800408000016000080000800108004480044800438004480044