Apple Microarchitecture Research by Dougall Johnson M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions M1/A14 E-core (Icestorm): Overview | Base Instructions | SIMD and FP Instructions
Code:
st2 { v0.2d, v1.2d }, [x6], x8 nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
mov x0, 0 mov x8, 0
(no loop instructions)
Retires (minus 60 nops): 4.000
Issues: 5.000
Integer unit issues: 1.000
Load/store unit issues: 2.000
SIMD/FP unit issues: 2.000
retire uop (01) | cycle (02) | 03 | l1i tlb fill (04) | mmu table walk instruction (07) | mmu table walk data (08) | 09 | l2 tlb miss instruction (0a) | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 22 | 23 | 24 | 3a | 3f | 46 | 49 | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 5e | 5f | 60 | 69 | 6d | 6e | map rewind (75) | map stall (76) | dispatch uop (78) | map ldst uop (7d) | map simd uop (7e) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst simd store (99) | inst ldst (9b) | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | bc | l1d cache miss st nonspec (c0) | c2 | c9 | cf | d0 | d2 | l1i cache miss demand (d3) | l1i tlb miss demand (d4) | d5 | map dispatch bubble (d6) | d9 | da | db | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
64007 | 28903 | 232 | 2 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 12 | 3 | 0 | 0 | 0 | 4688 | 28752 | 2 | 2 | 17877 | 5000 | 1000 | 2000 | 2002 | 1000 | 2000 | 2000 | 5000 | 21609 | 16000 | 0 | 10 | 0 | 21828 | 28715 | 28910 | 3 | 10 | 5000 | 2000 | 2000 | 5000 | 4000 | 28871 | 28728 | 1 | 1 | 61001 | 1000 | 1000 | 2000 | 0 | 6 | 0 | 2002 | 0 | 0 | 2 | 2002 | 2 | 4 | 0 | 0 | 13366 | 9289 | 6850 | 3190 | 0 | 34 | 19828 | 3280 | 3772 | 14 | 36 | 38 | 28321 | 1000 | 15572 | 12605 | 14011 | 2000 | 2000 | 1000 | 28798 | 28878 | 28884 | 28720 | 28865 |
64004 | 29115 | 232 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | 0 | 0 | 4696 | 28755 | 2 | 2 | 17783 | 5000 | 1000 | 2000 | 2000 | 1000 | 2000 | 2000 | 5000 | 21600 | 16000 | 0 | 5 | 1 | 21911 | 28639 | 28946 | 3 | 10 | 5000 | 2000 | 2000 | 5000 | 4000 | 28946 | 28823 | 1 | 1 | 61001 | 1000 | 1000 | 2004 | 0 | 6 | 0 | 2000 | 0 | 4 | 0 | 2002 | 0 | 4 | 0 | 0 | 13207 | 9310 | 6970 | 3143 | 0 | 41 | 20001 | 3244 | 3821 | 10 | 35 | 40 | 28564 | 1001 | 16004 | 12861 | 13965 | 2000 | 2000 | 1000 | 29085 | 28902 | 29087 | 28886 | 28984 |
64004 | 29095 | 234 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 4 | 132 | 177 | 0 | 0 | 0 | 4680 | 28877 | 2 | 0 | 17959 | 5005 | 1000 | 2002 | 2004 | 1000 | 2006 | 2000 | 5015 | 21606 | 16032 | 1 | 7 | 0 | 21861 | 28795 | 28943 | 3 | 49 | 5005 | 2006 | 2002 | 5005 | 4004 | 28935 | 28902 | 3 | 1 | 61001 | 1000 | 1000 | 2000 | 0 | 4 | 0 | 2002 | 0 | 0 | 0 | 2000 | 0 | 4 | 0 | 0 | 12916 | 9331 | 6924 | 3115 | 0 | 34 | 20142 | 3186 | 3817 | 25 | 33 | 38 | 28623 | 1001 | 15914 | 12895 | 14208 | 2000 | 2000 | 1000 | 29205 | 29044 | 29182 | 29119 | 29289 |
64004 | 29185 | 233 | 0 | 0 | 1 | 0 | 0 | 1 | 2 | 2 | 273 | 177 | 0 | 0 | 0 | 4622 | 29058 | 2 | 2 | 17983 | 5010 | 1000 | 2002 | 2000 | 1000 | 2000 | 2000 | 5000 | 21613 | 16000 | 0 | 3 | 0 | 21878 | 28896 | 28998 | 3 | 10 | 5000 | 2000 | 2000 | 5000 | 4000 | 29268 | 29107 | 1 | 1 | 61001 | 1000 | 1000 | 2004 | 0 | 6 | 0 | 2000 | 0 | 2 | 2 | 2000 | 0 | 4 | 0 | 508 | 13256 | 9327 | 6948 | 3108 | 0 | 26 | 20315 | 3281 | 3824 | 13 | 38 | 32 | 28505 | 1000 | 15813 | 12669 | 13904 | 2000 | 2000 | 1000 | 28779 | 28828 | 28861 | 28950 | 28972 |
64005 | 28767 | 232 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1 | 0 | 0 | 0 | 4765 | 28544 | 2 | 2 | 17715 | 5000 | 1000 | 2000 | 2002 | 1000 | 2000 | 2000 | 5000 | 21601 | 16000 | 0 | 5 | 0 | 21811 | 28680 | 29042 | 3 | 10 | 5000 | 2000 | 2000 | 5000 | 4000 | 28543 | 28647 | 1 | 1 | 61001 | 1000 | 1000 | 2000 | 0 | 4 | 0 | 2000 | 0 | 0 | 0 | 2000 | 0 | 4 | 0 | 2586 | 13253 | 9472 | 6973 | 3163 | 0 | 33 | 19741 | 3161 | 3825 | 13 | 33 | 28 | 28280 | 1000 | 15373 | 12504 | 13609 | 2000 | 2000 | 1000 | 28761 | 28742 | 28785 | 28759 | 28970 |
64004 | 28840 | 231 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 | 0 | 0 | 0 | 4740 | 28531 | 2 | 2 | 18088 | 5040 | 1006 | 2010 | 2016 | 1008 | 2010 | 2020 | 5045 | 22198 | 16144 | 0 | 0 | 0 | 21970 | 29139 | 29305 | 74 | 290 | 5055 | 2014 | 2020 | 5035 | 4036 | 29400 | 29218 | 17 | 1 | 61001 | 1000 | 1000 | 2018 | 2 | 2 | 0 | 2016 | 0 | 0 | 5670 | 2012 | 2 | 4 | 0 | 0 | 13069 | 8867 | 6645 | 2988 | 0 | 32 | 20643 | 3146 | 3817 | 43 | 35 | 41 | 28393 | 1009 | 15592 | 12786 | 13490 | 2000 | 2000 | 1000 | 28738 | 29529 | 29836 | 29771 | 29840 |
64004 | 29520 | 234 | 0 | 0 | 1 | 0 | 0 | 1 | 10 | 9 | 1584 | 176 | 0 | 0 | 0 | 4731 | 29113 | 0 | 0 | 18019 | 5010 | 1004 | 2013 | 2006 | 1009 | 2010 | 2006 | 5040 | 21979 | 16128 | 0 | 3 | 0 | 21800 | 28889 | 29274 | 3 | 179 | 5035 | 2012 | 2008 | 5000 | 4024 | 29350 | 29103 | 11 | 1 | 61001 | 1000 | 1000 | 2010 | 2 | 6 | 0 | 2000 | 0 | 0 | 0 | 2000 | 0 | 4 | 0 | 0 | 13246 | 9762 | 7007 | 3201 | 0 | 38 | 19755 | 3243 | 3823 | 11 | 39 | 35 | 28289 | 1000 | 15428 | 12649 | 13777 | 2000 | 2000 | 1000 | 28658 | 28847 | 28609 | 28664 | 28963 |
64004 | 28895 | 224 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 4753 | 28512 | 2 | 0 | 17579 | 5000 | 1000 | 2000 | 2000 | 1000 | 2000 | 2000 | 5000 | 21615 | 16000 | 0 | 0 | 0 | 21832 | 28458 | 28817 | 3 | 10 | 5000 | 2000 | 2000 | 5000 | 4000 | 28653 | 28681 | 1 | 1 | 61001 | 1000 | 1000 | 2000 | 0 | 6 | 0 | 2000 | 0 | 0 | 2 | 2000 | 0 | 0 | 0 | 0 | 13165 | 9566 | 7038 | 3147 | 0 | 35 | 19543 | 3146 | 3828 | 16 | 36 | 37 | 28312 | 1000 | 15609 | 12567 | 13511 | 2000 | 2000 | 1000 | 28859 | 28651 | 28566 | 28708 | 28692 |
64004 | 28693 | 223 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 4645 | 28703 | 2 | 2 | 17788 | 5000 | 1000 | 2000 | 2000 | 1000 | 2000 | 2000 | 5000 | 21615 | 16000 | 0 | 5 | 0 | 21820 | 28705 | 28887 | 3 | 30 | 5000 | 2000 | 2000 | 5000 | 4000 | 28761 | 28773 | 1 | 1 | 61001 | 1000 | 1000 | 2000 | 0 | 6 | 0 | 2000 | 0 | 0 | 0 | 2000 | 0 | 6 | 0 | 0 | 13097 | 9241 | 6928 | 3142 | 0 | 38 | 19916 | 3312 | 3821 | 20 | 38 | 38 | 28402 | 1000 | 15456 | 12586 | 13892 | 2000 | 2000 | 1000 | 28992 | 28967 | 28913 | 28970 | 28936 |
64004 | 28878 | 233 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 132 | 1 | 0 | 0 | 0 | 4635 | 28818 | 0 | 0 | 17805 | 5000 | 1000 | 2000 | 2000 | 1000 | 2002 | 2000 | 5000 | 21613 | 16000 | 0 | 1 | 0 | 21857 | 28620 | 28839 | 3 | 10 | 5000 | 2000 | 2000 | 5000 | 4000 | 28797 | 28837 | 1 | 1 | 61001 | 1000 | 1000 | 2000 | 0 | 4 | 0 | 2000 | 0 | 0 | 1655 | 2000 | 2 | 0 | 0 | 0 | 13334 | 9381 | 6948 | 3160 | 0 | 34 | 19702 | 3293 | 3826 | 5 | 37 | 36 | 28253 | 1000 | 15412 | 12781 | 13798 | 2000 | 2000 | 1000 | 28658 | 28760 | 28741 | 28773 | 28778 |
Count: 8
Code:
st2 { v0.2d, v1.2d }, [x6], x8 st2 { v0.2d, v1.2d }, [x6], x8 st2 { v0.2d, v1.2d }, [x6], x8 st2 { v0.2d, v1.2d }, [x6], x8 st2 { v0.2d, v1.2d }, [x6], x8 st2 { v0.2d, v1.2d }, [x6], x8 st2 { v0.2d, v1.2d }, [x6], x8 st2 { v0.2d, v1.2d }, [x6], x8
mov x7, x6 mov x8, x6 mov x9, x6 mov x10, x6 mov x11, x6 mov x12, x6 mov x13, x6 mov x8, 0
(fused SUBS/B.cc loop)
Result (median cycles for code divided by count): 1.0006
retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | 09 | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 37 | 3a | 3f | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 60 | 69 | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map simd uop (7e) | map int uop inputs (7f) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int alu (97) | inst simd store (99) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | cd | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
320207 | 80052 | 621 | 0 | 0 | 0 | 0 | 0 | 0 | 12 | 3 | 3734 | 0 | 80029 | 16 | 16 | 0 | 25 | 403908 | 80100 | 162587 | 160000 | 80100 | 160000 | 160000 | 480499 | 2319215 | 1295611 | 0 | 80023 | 80044 | 80044 | 0 | 3 | 34 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80045 | 80045 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 40 | 0 | 0 | 160002 | 0 | 0 | 5 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 8 | 215 | 8 | 7 | 80042 | 80000 | 160000 | 160000 | 80100 | 80047 | 80046 | 80054 | 80046 | 80045 |
320204 | 80045 | 620 | 0 | 0 | 0 | 0 | 0 | 0 | 12 | 3 | 4116 | 0 | 80029 | 16 | 16 | 0 | 25 | 403882 | 80100 | 165403 | 160000 | 80100 | 160000 | 160000 | 480499 | 2157861 | 1295139 | 0 | 80023 | 80045 | 80045 | 0 | 3 | 27 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80045 | 80045 | 2 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 40 | 0 | 0 | 160002 | 1 | 0 | 5 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 8 | 17 | 8 | 4 | 80041 | 80000 | 160000 | 160000 | 80100 | 80046 | 80046 | 80046 | 80046 | 80046 |
320204 | 80045 | 620 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 4477 | 0 | 80030 | 16 | 16 | 0 | 25 | 406351 | 80100 | 163782 | 160000 | 80100 | 160000 | 160000 | 480499 | 2158044 | 1302087 | 0 | 80023 | 80045 | 80045 | 0 | 3 | 26 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80045 | 80045 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 40 | 0 | 0 | 160000 | 0 | 0 | 5 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 8 | 17 | 8 | 8 | 80041 | 80000 | 160000 | 160000 | 80100 | 80046 | 80046 | 80045 | 80046 | 80046 |
320204 | 80045 | 620 | 0 | 0 | 0 | 0 | 0 | 0 | 12 | 0 | 4037 | 0 | 80030 | 0 | 16 | 0 | 25 | 406780 | 80100 | 165899 | 160000 | 80100 | 160000 | 160000 | 480499 | 2236359 | 1297199 | 1 | 80023 | 80045 | 80043 | 0 | 3 | 27 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80045 | 80044 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 40 | 0 | 0 | 160002 | 1 | 0 | 2 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 8 | 17 | 8 | 8 | 80041 | 80000 | 160000 | 160000 | 80100 | 80046 | 80046 | 80046 | 80046 | 80046 |
320204 | 80045 | 621 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 5234 | 0 | 80030 | 16 | 16 | 0 | 25 | 404742 | 80100 | 164802 | 160000 | 80100 | 160000 | 160000 | 480499 | 2074116 | 1300157 | 0 | 80179 | 80045 | 80045 | 0 | 3 | 28 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80214 | 80044 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 40 | 0 | 0 | 160002 | 1 | 0 | 2 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 7 | 17 | 8 | 8 | 80195 | 80000 | 160000 | 160000 | 80100 | 80714 | 80046 | 80047 | 80215 | 80378 |
320204 | 80043 | 621 | 0 | 0 | 0 | 0 | 0 | 0 | 372 | 0 | 4153 | 0 | 80031 | 16 | 16 | 0 | 25 | 404192 | 80100 | 163613 | 160000 | 80100 | 160000 | 160000 | 480851 | 2079273 | 1297722 | 0 | 80023 | 80045 | 80045 | 0 | 3 | 26 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80044 | 80044 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 40 | 0 | 0 | 160002 | 0 | 0 | 0 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 7 | 17 | 7 | 8 | 80042 | 80000 | 160000 | 160000 | 80100 | 80047 | 80046 | 80048 | 80046 | 80046 |
320204 | 80044 | 620 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 4744 | 0 | 80030 | 16 | 16 | 0 | 25 | 405948 | 80100 | 163937 | 160000 | 80100 | 160000 | 160000 | 480499 | 2078869 | 1301628 | 0 | 80023 | 80045 | 80044 | 0 | 3 | 26 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80044 | 80044 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 40 | 0 | 3 | 160002 | 0 | 0 | 5 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 8 | 17 | 9 | 9 | 80353 | 80000 | 160000 | 160000 | 80100 | 80136 | 80214 | 80214 | 80045 | 80045 |
320204 | 80211 | 621 | 0 | 0 | 1 | 0 | 2 | 1 | 132 | 267 | 6205 | 1 | 80697 | 16 | 16 | 182 | 73 | 403547 | 80159 | 166604 | 160060 | 80159 | 160118 | 160216 | 480851 | 2331592 | 1304273 | 0 | 80331 | 80210 | 80377 | 84 | 9 | 226 | 400670 | 200 | 160120 | 160120 | 200 | 400600 | 320240 | 80214 | 80377 | 2 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160062 | 0 | 40 | 62 | 2 | 160062 | 0 | 2 | 935 | 160782 | 2 | 40 | 0 | 0 | 0 | 5109 | 10 | 34 | 9 | 4 | 80352 | 80059 | 160000 | 160000 | 80100 | 80549 | 80217 | 80379 | 80379 | 80213 |
320204 | 80548 | 622 | 0 | 0 | 0 | 0 | 1 | 1 | 132 | 88 | 2519 | 0 | 80029 | 16 | 16 | 0 | 25 | 404461 | 80100 | 164369 | 160000 | 80100 | 160000 | 160000 | 480499 | 2079170 | 1314232 | 0 | 80024 | 80044 | 80044 | 0 | 3 | 28 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80054 | 80045 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 40 | 0 | 0 | 160002 | 1 | 0 | 2 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 8 | 17 | 8 | 8 | 80042 | 80000 | 160000 | 160000 | 80100 | 80047 | 80045 | 80046 | 80046 | 80045 |
320204 | 80044 | 620 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3875 | 0 | 80030 | 16 | 16 | 0 | 25 | 402967 | 80100 | 164203 | 160000 | 80100 | 160000 | 160000 | 480499 | 2079663 | 1305917 | 0 | 80024 | 80045 | 80045 | 0 | 3 | 27 | 400100 | 200 | 160000 | 160000 | 200 | 400000 | 320000 | 80044 | 80045 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 160000 | 0 | 42 | 0 | 0 | 160002 | 0 | 0 | 6 | 160002 | 2 | 40 | 0 | 0 | 0 | 5109 | 7 | 17 | 8 | 8 | 80042 | 80000 | 160000 | 160000 | 80100 | 80722 | 80049 | 80047 | 80046 | 80046 |
Result (median cycles for code divided by count): 1.0006
retire uop (01) | cycle (02) | 03 | mmu table walk data (08) | l2 tlb miss instruction (0a) | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 22 | 23 | 37 | 3a | 3f | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 60 | 69 | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map simd uop (7e) | map int uop inputs (7f) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int alu (97) | inst simd store (99) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | bc | l1d cache miss st nonspec (c0) | c2 | cf | d0 | d2 | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
320027 | 80057 | 621 | 0 | 0 | 0 | 0 | 0 | 843 | 91 | 1 | 0 | 4540 | 0 | 80029 | 16 | 16 | 0 | 25 | 404963 | 80010 | 166105 | 160000 | 80010 | 160000 | 160000 | 480049 | 2077345 | 1295006 | 0 | 80029 | 80044 | 80045 | 0 | 3 | 34 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80215 | 80045 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 0 | 0 | 0 | 160000 | 1 | 0 | 2 | 160002 | 2 | 40 | 0 | 5019 | 0 | 0 | 16 | 17 | 7 | 15 | 80041 | 80000 | 160000 | 160000 | 80010 | 80046 | 80044 | 80046 | 80045 | 80045 |
320024 | 80044 | 620 | 0 | 0 | 0 | 0 | 0 | 792 | 3 | 1 | 0 | 6268 | 0 | 80029 | 16 | 16 | 0 | 25 | 403986 | 80010 | 164406 | 160000 | 80010 | 160000 | 160000 | 480049 | 2079665 | 1293745 | 1 | 80024 | 80044 | 80045 | 0 | 3 | 27 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80045 | 80045 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 0 | 0 | 0 | 160062 | 1 | 0 | 2 | 160002 | 2 | 40 | 0 | 5019 | 0 | 0 | 6 | 17 | 17 | 15 | 80042 | 80000 | 160000 | 160000 | 80010 | 80046 | 80045 | 80045 | 80046 | 80045 |
320024 | 80045 | 620 | 0 | 0 | 0 | 0 | 0 | 909 | 3 | 1 | 0 | 5444 | 0 | 80030 | 16 | 16 | 0 | 49 | 403821 | 80010 | 166156 | 160000 | 80010 | 160000 | 160000 | 480049 | 2159002 | 1295139 | 0 | 80024 | 80044 | 80045 | 0 | 3 | 25 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80212 | 80045 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 40 | 0 | 0 | 160062 | 1 | 0 | 2 | 160002 | 2 | 40 | 0 | 5019 | 0 | 0 | 8 | 17 | 15 | 6 | 80196 | 80000 | 160000 | 160000 | 80010 | 80045 | 80046 | 80088 | 80045 | 80046 |
320024 | 80044 | 620 | 0 | 0 | 0 | 0 | 0 | 177 | 3 | 1 | 0 | 3670 | 0 | 80029 | 16 | 16 | 0 | 25 | 405134 | 80010 | 164325 | 160000 | 80010 | 160000 | 160000 | 480401 | 2079321 | 1308650 | 0 | 80023 | 80046 | 80045 | 0 | 3 | 27 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80045 | 80045 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 40 | 0 | 0 | 160002 | 0 | 0 | 2 | 160002 | 2 | 0 | 0 | 5019 | 0 | 0 | 18 | 17 | 8 | 19 | 80042 | 80059 | 160000 | 160000 | 80010 | 80045 | 80046 | 80046 | 80045 | 80046 |
320024 | 80044 | 620 | 0 | 0 | 0 | 0 | 1 | 411 | 0 | 1 | 0 | 4170 | 0 | 80030 | 0 | 16 | 0 | 25 | 405872 | 80010 | 164509 | 160000 | 80010 | 160000 | 160000 | 480049 | 2079451 | 1294090 | 0 | 80024 | 80045 | 80044 | 0 | 3 | 27 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80044 | 80045 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 40 | 0 | 0 | 160000 | 0 | 2 | 5 | 160002 | 2 | 40 | 0 | 5019 | 0 | 0 | 7 | 17 | 16 | 7 | 80042 | 80000 | 160000 | 160000 | 80010 | 80046 | 80046 | 80045 | 80045 | 80046 |
320024 | 80045 | 620 | 0 | 1 | 0 | 0 | 0 | 927 | 3 | 1 | 0 | 3909 | 0 | 80028 | 16 | 16 | 0 | 25 | 406480 | 80010 | 166295 | 160060 | 80010 | 160000 | 160000 | 480049 | 2157526 | 1304927 | 0 | 80024 | 80287 | 80045 | 0 | 3 | 33 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80044 | 80045 | 2 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 40 | 0 | 0 | 160002 | 0 | 0 | 3 | 160002 | 2 | 40 | 0 | 5019 | 0 | 0 | 15 | 17 | 8 | 16 | 80044 | 80000 | 160000 | 160000 | 80010 | 80046 | 80046 | 80045 | 80046 | 80045 |
320024 | 80045 | 620 | 0 | 0 | 0 | 0 | 0 | 903 | 3 | 1 | 0 | 2268 | 0 | 80029 | 0 | 0 | 0 | 25 | 402391 | 80010 | 163875 | 160000 | 80010 | 160000 | 160000 | 480049 | 2159342 | 1298585 | 0 | 80023 | 80045 | 80044 | 0 | 3 | 35 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80045 | 80044 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 40 | 0 | 0 | 160002 | 0 | 0 | 2 | 160002 | 2 | 40 | 0 | 5019 | 0 | 0 | 15 | 17 | 16 | 14 | 80041 | 80000 | 160000 | 160000 | 80010 | 80046 | 80045 | 80046 | 80046 | 80046 |
320024 | 80045 | 620 | 0 | 0 | 0 | 0 | 0 | 873 | 3 | 1 | 0 | 4139 | 0 | 80030 | 16 | 16 | 0 | 25 | 406508 | 80010 | 165626 | 160000 | 80010 | 160000 | 160000 | 480049 | 1919534 | 1304130 | 0 | 80023 | 80054 | 80045 | 0 | 3 | 34 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80045 | 80045 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 40 | 0 | 0 | 160000 | 0 | 0 | 0 | 160000 | 0 | 0 | 0 | 5019 | 0 | 0 | 8 | 17 | 16 | 16 | 80041 | 80000 | 160000 | 160000 | 80010 | 80046 | 80046 | 80046 | 80046 | 80045 |
320024 | 80044 | 621 | 0 | 0 | 0 | 0 | 0 | 948 | 3 | 1 | 0 | 4050 | 0 | 80031 | 16 | 16 | 0 | 25 | 404348 | 80069 | 163738 | 160000 | 80010 | 160000 | 160000 | 480049 | 2079497 | 1306533 | 0 | 80023 | 80045 | 80044 | 0 | 3 | 27 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320240 | 80045 | 80045 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160000 | 0 | 40 | 0 | 0 | 160000 | 0 | 0 | 0 | 160002 | 2 | 42 | 0 | 5019 | 0 | 0 | 16 | 17 | 17 | 15 | 80042 | 80000 | 160000 | 160000 | 80010 | 80046 | 80046 | 80046 | 80046 | 80046 |
320024 | 80044 | 621 | 0 | 0 | 0 | 0 | 0 | 408 | 3 | 1 | 0 | 3826 | 0 | 80030 | 16 | 16 | 0 | 25 | 403578 | 80010 | 164363 | 160000 | 80010 | 160000 | 160108 | 480049 | 2158675 | 1298659 | 0 | 80024 | 80044 | 80044 | 0 | 3 | 34 | 400010 | 20 | 160000 | 160000 | 20 | 400000 | 320000 | 80045 | 80045 | 1 | 1 | 80021 | 10 | 9 | 10 | 10 | 80000 | 80000 | 10 | 160062 | 0 | 40 | 0 | 0 | 160002 | 0 | 0 | 0 | 160002 | 0 | 40 | 0 | 5033 | 0 | 0 | 16 | 17 | 6 | 17 | 80042 | 80000 | 160000 | 160000 | 80010 | 80045 | 80046 | 80046 | 80045 | 80047 |