Apple Microarchitecture Research by Dougall Johnson M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions M1/A14 E-core (Icestorm): Overview | Base Instructions | SIMD and FP Instructions
Code:
st2 { v0.d, v1.d }[1], [x6], x8 nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
mov x0, 0 mov x8, 0
(no loop instructions)
Retires (minus 60 nops): 2.000
Issues: 3.000
Integer unit issues: 1.000
Load/store unit issues: 1.000
SIMD/FP unit issues: 1.000
retire uop (01) | cycle (02) | 03 | l1i tlb fill (04) | l1d tlb fill (05) | mmu table walk instruction (07) | mmu table walk data (08) | l2 tlb miss instruction (0a) | l2 tlb miss data (0b) | 1e | 1f | 22 | 23 | 3a | 3f | 46 | 49 | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 5f | 60 | 61 | 69 | 6d | 6e | map rewind (75) | map stall (76) | dispatch uop (78) | map ldst uop (7d) | map simd uop (7e) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst simd store (99) | inst ldst (9b) | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | cf | d0 | d2 | l1i cache miss demand (d3) | l1i tlb miss demand (d4) | d5 | map dispatch bubble (d6) | d9 | da | db | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ec | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
62006 | 29258 | 228 | 3 | 1 | 0 | 1 | 1 | 1 | 111 | 1 | 0 | 0 | 4709 | 29074 | 1 | 1 | 18234 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10904 | 8000 | 16 | 0 | 0 | 21660 | 28987 | 29369 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 29315 | 29242 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 3 | 0 | 1000 | 0 | 0 | 0 | 1000 | 1 | 3 | 0 | 0 | 13016 | 9295 | 6929 | 3116 | 1 | 44 | 20676 | 3219 | 3805 | 10 | 45 | 47 | 28531 | 1000 | 16235 | 13149 | 14323 | 1000 | 1000 | 1000 | 29324 | 29269 | 29165 | 29299 | 29174 |
62004 | 29288 | 226 | 1 | 0 | 0 | 0 | 0 | 0 | 18 | 1 | 0 | 0 | 4704 | 29095 | 0 | 0 | 18303 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10902 | 8000 | 5 | 0 | 0 | 21698 | 29005 | 29307 | 3 | 10 | 3000 | 1000 | 1001 | 3000 | 2000 | 29329 | 29292 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 3 | 1000 | 0 | 4 | 1 | 2 | 12932 | 9158 | 6929 | 3126 | 0 | 41 | 20669 | 3226 | 3806 | 10 | 48 | 52 | 28580 | 1000 | 16187 | 13252 | 14256 | 1000 | 1000 | 1000 | 29389 | 29303 | 29337 | 29321 | 29283 |
62004 | 29278 | 228 | 1 | 1 | 1 | 1 | 0 | 1 | 18 | 0 | 0 | 0 | 4665 | 29141 | 0 | 0 | 18511 | 3000 | 1000 | 1000 | 1000 | 1001 | 1000 | 1000 | 5000 | 10913 | 8000 | 0 | 0 | 0 | 21714 | 29299 | 29341 | 3 | 10 | 3000 | 1001 | 1000 | 3000 | 2000 | 29342 | 29582 | 1 | 1 | 61001 | 1000 | 1000 | 1002 | 2 | 4 | 1 | 1001 | 0 | 1 | 1 | 1000 | 1 | 0 | 0 | 0 | 13199 | 9163 | 6891 | 3154 | 0 | 46 | 21021 | 3237 | 3816 | 10 | 45 | 48 | 28759 | 1000 | 16400 | 13514 | 14489 | 1000 | 1000 | 1000 | 29583 | 29564 | 29441 | 29495 | 29368 |
62004 | 29401 | 236 | 0 | 0 | 0 | 0 | 0 | 0 | 42 | 1 | 0 | 0 | 4712 | 29022 | 0 | 0 | 18392 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10905 | 8000 | 5 | 0 | 0 | 21692 | 29001 | 29410 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 29229 | 29207 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 3 | 0 | 1000 | 0 | 0 | 3 | 1000 | 0 | 0 | 1 | 0 | 13411 | 9797 | 7050 | 3216 | 1 | 46 | 19797 | 3381 | 3805 | 9 | 43 | 44 | 28052 | 1000 | 14402 | 12192 | 12628 | 1000 | 1000 | 1000 | 28606 | 28727 | 28655 | 28618 | 28163 |
62004 | 28220 | 212 | 2 | 0 | 0 | 0 | 0 | 0 | 12 | 1 | 0 | 0 | 5062 | 28175 | 1 | 0 | 17396 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10908 | 8000 | 17 | 0 | 0 | 21709 | 28059 | 28313 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28230 | 28361 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 3 | 0 | 1000 | 0 | 0 | 0 | 1000 | 0 | 3 | 0 | 0 | 13722 | 10022 | 7183 | 3347 | 1 | 45 | 19634 | 3379 | 3806 | 14 | 43 | 39 | 27846 | 1000 | 14418 | 12146 | 12998 | 1000 | 1000 | 1000 | 28152 | 28139 | 28100 | 28172 | 28351 |
62004 | 28415 | 211 | 1 | 0 | 1 | 0 | 1 | 0 | 12 | 1 | 0 | 0 | 5233 | 28250 | 0 | 0 | 17857 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10904 | 8000 | 11 | 0 | 0 | 21700 | 28582 | 28689 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28477 | 28692 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 0 | 0 | 1000 | 1 | 0 | 0 | 1000 | 0 | 2 | 0 | 0 | 13697 | 10173 | 7128 | 3359 | 0 | 44 | 19793 | 3232 | 3814 | 13 | 45 | 55 | 28413 | 1000 | 15657 | 13101 | 13817 | 1000 | 1000 | 1000 | 28647 | 28675 | 28893 | 28814 | 28684 |
62004 | 28527 | 222 | 3 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 5046 | 28129 | 0 | 0 | 17348 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10907 | 8000 | 6 | 1 | 0 | 21686 | 28184 | 28249 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28230 | 28395 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 0 | 1000 | 0 | 0 | 0 | 0 | 13794 | 10033 | 7219 | 3530 | 1 | 46 | 19668 | 3337 | 3814 | 8 | 42 | 45 | 27858 | 1000 | 14196 | 12309 | 13308 | 1000 | 1000 | 1000 | 28279 | 28309 | 28285 | 28286 | 28317 |
62004 | 28120 | 212 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 5134 | 28132 | 1 | 0 | 17321 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10913 | 8000 | 10 | 0 | 0 | 21739 | 28104 | 28257 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28334 | 28312 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 0 | 0 | 1000 | 0 | 0 | 0 | 1000 | 0 | 2 | 0 | 0 | 13663 | 10343 | 7276 | 3432 | 0 | 42 | 19456 | 3393 | 3807 | 10 | 46 | 51 | 27917 | 1000 | 14585 | 12108 | 12405 | 1000 | 1000 | 1000 | 28323 | 28318 | 28230 | 28128 | 28155 |
62004 | 28329 | 212 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 5155 | 28331 | 0 | 0 | 17167 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10911 | 8000 | 6 | 1 | 0 | 21764 | 28364 | 28399 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28339 | 28336 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 0 | 1000 | 0 | 0 | 1 | 0 | 13766 | 9756 | 7124 | 3385 | 0 | 49 | 19690 | 3318 | 3809 | 9 | 46 | 44 | 28418 | 1000 | 14533 | 12358 | 13081 | 1000 | 1000 | 1000 | 28321 | 28350 | 28387 | 28145 | 28473 |
62004 | 28293 | 212 | 1 | 0 | 0 | 0 | 0 | 0 | 15 | 1 | 0 | 0 | 5134 | 28255 | 1 | 1 | 17173 | 3000 | 1000 | 1000 | 1000 | 1000 | 1000 | 1000 | 5000 | 10912 | 8000 | 11 | 0 | 0 | 21743 | 28247 | 28437 | 3 | 10 | 3000 | 1000 | 1000 | 3000 | 2000 | 28291 | 28216 | 1 | 1 | 61001 | 1000 | 1000 | 1000 | 0 | 2 | 0 | 1000 | 0 | 0 | 3 | 1000 | 0 | 2 | 1 | 0 | 13841 | 10120 | 7128 | 3332 | 0 | 46 | 19635 | 3322 | 3812 | 11 | 45 | 42 | 28028 | 1000 | 14714 | 12324 | 12713 | 1000 | 1000 | 1000 | 28280 | 28189 | 28536 | 28352 | 28275 |
Count: 8
Code:
st2 { v0.d, v1.d }[1], [x6], x8 st2 { v0.d, v1.d }[1], [x6], x8 st2 { v0.d, v1.d }[1], [x6], x8 st2 { v0.d, v1.d }[1], [x6], x8 st2 { v0.d, v1.d }[1], [x6], x8 st2 { v0.d, v1.d }[1], [x6], x8 st2 { v0.d, v1.d }[1], [x6], x8 st2 { v0.d, v1.d }[1], [x6], x8
mov x7, x6 mov x8, x6 mov x9, x6 mov x10, x6 mov x11, x6 mov x12, x6 mov x13, x6 mov x8, 0
(fused SUBS/B.cc loop)
Result (median cycles for code divided by count): 1.0005
retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 22 | 37 | 3a | 3f | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 69 | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map simd uop (7e) | map int uop inputs (7f) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int alu (97) | inst simd store (99) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | cf | d0 | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
160206 | 80040 | 620 | 0 | 0 | 0 | 1 | 0 | 0 | 2 | 0 | 1035 | 0 | 80025 | 8 | 8 | 2 | 25 | 240232 | 80100 | 81453 | 80000 | 80100 | 80000 | 80000 | 4359014 | 3758848 | 652906 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80000 | 0 | 21 | 0 | 0 | 80001 | 0 | 0 | 6 | 80001 | 0 | 21 | 0 | 0 | 5110 | 0 | 1 | 16 | 2 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 81665 | 83112 | 81633 | 80041 | 80041 |
160204 | 80040 | 620 | 0 | 0 | 0 | 0 | 0 | 15 | 4 | 0 | 4303 | 0 | 80025 | 8 | 8 | 1 | 25 | 241260 | 80100 | 84302 | 80000 | 80216 | 80000 | 80000 | 4359014 | 3758848 | 643469 | 80015 | 80040 | 80165 | 59924 | 3 | 59998 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80000 | 0 | 21 | 0 | 0 | 80001 | 3 | 0 | 3 | 80001 | 1 | 21 | 0 | 0 | 5128 | 0 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 621 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1721 | 0 | 80025 | 8 | 8 | 1 | 25 | 240287 | 80100 | 81477 | 80000 | 80100 | 80000 | 80000 | 4359014 | 3758848 | 643484 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 240440 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80007 | 7 | 29 | 0 | 0 | 80068 | 0 | 1 | 8 | 80001 | 7 | 1 | 7 | 0 | 5110 | 0 | 2 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 620 | 1 | 0 | 0 | 0 | 0 | 0 | 9 | 0 | 116 | 1 | 80025 | 9 | 9 | 75 | 25 | 240261 | 80100 | 83440 | 80000 | 80100 | 80000 | 80000 | 4358994 | 3758848 | 644403 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 240100 | 200 | 80000 | 80000 | 200 | 240360 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80007 | 7 | 29 | 0 | 2 | 80008 | 2 | 1 | 11 | 80001 | 7 | 29 | 7 | 1 | 5110 | 0 | 2 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80273 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 621 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 | 802 | 0 | 80025 | 8 | 8 | 2 | 25 | 241580 | 80100 | 86043 | 80060 | 80100 | 80000 | 80000 | 4359014 | 3758848 | 645299 | 80015 | 80164 | 80040 | 59924 | 3 | 59998 | 240780 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 2 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80000 | 0 | 0 | 0 | 0 | 80001 | 0 | 0 | 3 | 80001 | 8 | 29 | 7 | 1 | 5110 | 0 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80162 |
160204 | 80040 | 620 | 1 | 0 | 0 | 0 | 0 | 0 | 9 | 0 | 2051 | 1 | 80025 | 9 | 9 | 1 | 25 | 242149 | 80100 | 81804 | 80000 | 80100 | 80116 | 80000 | 4363261 | 3758848 | 653980 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80008 | 8 | 29 | 0 | 0 | 80008 | 0 | 0 | 8 | 80001 | 8 | 29 | 7 | 1 | 5110 | 0 | 1 | 16 | 2 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80163 | 620 | 1 | 0 | 0 | 0 | 0 | 0 | 7 | 0 | 123 | 1 | 80146 | 9 | 8 | 73 | 25 | 241667 | 80100 | 83466 | 80060 | 80100 | 80000 | 80000 | 4358990 | 3758848 | 652815 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 240100 | 200 | 80000 | 80120 | 200 | 240000 | 160240 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80008 | 7 | 29 | 0 | 0 | 80008 | 0 | 0 | 1096 | 80001 | 8 | 21 | 0 | 0 | 5110 | 0 | 1 | 16 | 2 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80164 | 80041 | 80041 | 80041 |
160204 | 80040 | 621 | 0 | 0 | 0 | 0 | 0 | 132 | 4 | 0 | 1035 | 0 | 80025 | 8 | 8 | 2 | 25 | 240222 | 80100 | 80132 | 80000 | 80217 | 80000 | 80000 | 4359014 | 3758848 | 652788 | 80015 | 80159 | 80040 | 59924 | 3 | 59998 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80000 | 0 | 21 | 30 | 0 | 80001 | 1 | 0 | 3 | 80001 | 1 | 0 | 0 | 0 | 5110 | 0 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 621 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 2840 | 0 | 80025 | 8 | 8 | 1 | 25 | 240972 | 80100 | 80132 | 80000 | 80100 | 80000 | 80000 | 4359014 | 3763084 | 640366 | 80015 | 80040 | 80040 | 59924 | 3 | 59998 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80000 | 0 | 21 | 0 | 0 | 80001 | 1 | 0 | 1 | 80001 | 0 | 21 | 0 | 0 | 5110 | 1 | 1 | 16 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
160204 | 80040 | 621 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 | 1461 | 0 | 80025 | 8 | 8 | 2 | 25 | 244345 | 80100 | 84245 | 80000 | 80100 | 80000 | 80000 | 4359014 | 3758848 | 642407 | 80015 | 80040 | 80040 | 59924 | 3 | 60085 | 240100 | 200 | 80000 | 80000 | 200 | 240000 | 160000 | 80040 | 80146 | 1 | 1 | 80201 | 100 | 99 | 100 | 100 | 80000 | 80000 | 100 | 80000 | 0 | 21 | 0 | 2 | 80001 | 0 | 0 | 1 | 80000 | 0 | 21 | 0 | 0 | 5110 | 0 | 1 | 25 | 1 | 1 | 80037 | 80000 | 80000 | 80000 | 80100 | 80041 | 80041 | 80041 | 80041 | 80041 |
Result (median cycles for code divided by count): 1.0005
retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | 09 | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 22 | 24 | 37 | 3a | 3f | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule simd uop (54) | schedule ldst uop (55) | dispatch int uop (56) | dispatch simd uop (57) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | ldst uops in schedulers (5b) | 60 | 69 | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map simd uop (7e) | map int uop inputs (7f) | map ldst uop inputs (80) | map simd uop inputs (81) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | 91 | inst branch cond (94) | inst int alu (97) | inst simd store (99) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | ? ldst retires (ed) | ? simd retires (ee) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
160026 | 80165 | 622 | 1 | 2 | 0 | 0 | 1 | 1 | 132 | 179 | 0 | 0 | 3754 | 0 | 80025 | 8 | 8 | 1 | 25 | 244748 | 80010 | 84693 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 641742 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 17 | 0 | 0 | 80001 | 0 | 0 | 2 | 80001 | 8 | 25 | 0 | 0 | 5020 | 3 | 16 | 6 | 5 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 0 | 0 | 1 | 0 | 0 | 0 | 12 | 12 | 0 | 0 | 3755 | 1 | 80025 | 9 | 11 | 1 | 25 | 240932 | 80010 | 85693 | 80000 | 80010 | 80000 | 80000 | 4358409 | 3758848 | 651268 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80007 | 7 | 17 | 0 | 0 | 80008 | 0 | 0 | 8 | 80001 | 8 | 25 | 7 | 0 | 5020 | 5 | 16 | 3 | 4 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 9 | 0 | 0 | 4696 | 1 | 80025 | 10 | 11 | 6 | 25 | 245696 | 80010 | 81724 | 80000 | 80010 | 80000 | 80000 | 4358405 | 3758848 | 642769 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 8 | 25 | 0 | 0 | 80007 | 0 | 0 | 14 | 80001 | 8 | 25 | 7 | 0 | 5020 | 3 | 16 | 5 | 4 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 621 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 12 | 0 | 0 | 4691 | 1 | 80025 | 10 | 0 | 2 | 25 | 244752 | 80010 | 84742 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 646400 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80008 | 7 | 17 | 0 | 1 | 80007 | 1 | 0 | 8 | 80001 | 8 | 25 | 7 | 0 | 5020 | 4 | 16 | 9 | 5 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 12 | 0 | 0 | 1147 | 1 | 80025 | 9 | 8 | 0 | 25 | 241391 | 80010 | 82360 | 80000 | 80010 | 80000 | 80000 | 4358409 | 3758848 | 643441 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80007 | 0 | 25 | 0 | 0 | 80008 | 0 | 1 | 11 | 80001 | 8 | 25 | 7 | 1 | 5020 | 4 | 16 | 7 | 4 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 | 0 | 3759 | 1 | 80025 | 8 | 11 | 2 | 25 | 241162 | 80010 | 85680 | 80000 | 80010 | 80000 | 80000 | 4358405 | 3758848 | 651268 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80008 | 0 | 0 | 0 | 0 | 80001 | 0 | 0 | 0 | 80001 | 7 | 0 | 7 | 0 | 5020 | 4 | 16 | 8 | 6 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 1 | 0 | 0 | 0 | 0 | 0 | 12 | 2 | 0 | 0 | 3789 | 1 | 80025 | 11 | 11 | 2 | 25 | 240020 | 80010 | 81148 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 651376 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80007 | 8 | 25 | 0 | 0 | 80008 | 1 | 0 | 8 | 80001 | 8 | 0 | 7 | 0 | 5020 | 4 | 16 | 6 | 5 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 9 | 0 | 0 | 4695 | 1 | 80025 | 11 | 11 | 2 | 25 | 240032 | 80010 | 85689 | 80000 | 80010 | 80000 | 80000 | 4358413 | 3758848 | 648448 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80007 | 7 | 26 | 0 | 1 | 80008 | 1 | 0 | 8 | 80000 | 1 | 17 | 0 | 0 | 5020 | 7 | 16 | 6 | 5 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 | 0 | 4694 | 0 | 80025 | 8 | 8 | 3 | 25 | 240585 | 80010 | 80009 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 643450 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 0 | 0 | 0 | 80001 | 0 | 0 | 2 | 80001 | 1 | 17 | 0 | 0 | 5020 | 5 | 16 | 7 | 4 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |
160024 | 80040 | 620 | 0 | 0 | 0 | 0 | 0 | 0 | 6 | 3 | 0 | 0 | 4694 | 0 | 80025 | 8 | 0 | 0 | 25 | 241160 | 80010 | 80019 | 80000 | 80010 | 80000 | 80000 | 4358429 | 3758848 | 640036 | 0 | 80015 | 80040 | 80040 | 59946 | 3 | 60020 | 240010 | 20 | 80000 | 80000 | 20 | 240000 | 160000 | 80040 | 80040 | 1 | 1 | 80021 | 10 | 9 | 0 | 10 | 10 | 80000 | 80000 | 10 | 80000 | 0 | 17 | 0 | 0 | 80001 | 0 | 0 | 1 | 80001 | 0 | 17 | 0 | 0 | 5020 | 5 | 16 | 4 | 5 | 80037 | 80000 | 0 | 80000 | 80000 | 80010 | 80041 | 80041 | 80041 | 80041 | 80041 |