Firestorm: ST4 (multiple, 8B) measurements

Code:

  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop

Initialization

  mov x0, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 60 nops): 6.000

Issues: 6.000

Integer unit issues: 0.000

Load/store unit issues: 2.000

SIMD/FP unit issues: 4.000

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	l1d tlb fill (05)	mmu table walk instruction (07)	mmu table walk data (08)	l2 tlb miss instruction (0a)	l2 tlb miss data (0b)	18	19	1e	1f	22	23	24	37	3a	3f	46	49	51	schedule uop (52)	schedule simd uop (54)	schedule ldst uop (55)	dispatch simd uop (57)	dispatch ldst uop (58)	simd uops in schedulers (5a)	ldst uops in schedulers (5b)	5f	60	61	69	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map ldst uop (7d)	map simd uop (7e)	map ldst uop inputs (80)	map simd uop inputs (81)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst simd store (99)	inst ldst (9b)	l1d tlb access (a0)	l1d tlb miss (a1)	l1d cache miss st (a2)	ld unit uop (a6)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	af	bc	l1d cache miss st nonspec (c0)	l1d tlb miss nonspec (c1)	c2	c9	cf	d0	d2	l1i cache miss demand (d3)	l1i tlb miss demand (d4)	d5	map dispatch bubble (d6)	d9	da	db	dd	fetch restart (de)	e0	ea	eb	ec	? ldst retires (ed)	? simd retires (ee)	f5	f6	f7	f8	fd
66007	29188	233	1	21	0	13	0	0	0	0	4	1	0	0	0	4620	28887	0	2	15745	6006	4000	2000	4000	2000	25602	35807	11	0	0	23782	28845	29094	3	10	6000	2000	4000	4000	10000	29020	29032	1	1	61001	1000	1000	2003	2	4	1	2002	3	3	2	2004	2	6	2	0	0	13183	9348	6906	3099	9	50	19889	3384	3813	23	50	43	28422	15921	12824	13792	2000	4000	29182	29083	29262	29177	29143
66004	29182	234	1	20	0	18	2	2	1	264	180	1	0	0	0	4717	29157	2	2	15924	6006	4000	2004	4004	2004	25714	35870	6	0	0	23874	29041	29360	29	10	6042	2014	4036	4016	10050	29281	29310	10	1	61001	1000	1000	2007	3	6	9	2004	1	0	2	2002	2	6	2	3	0	13195	9149	6919	3073	8	41	20026	3268	3811	32	45	49	28518	16392	13224	14009	2000	4000	29191	29319	29042	29310	29309
66004	29108	235	1	24	0	20	0	2	1	279	3	1	0	0	0	4546	29021	2	2	16119	6000	4000	2000	4004	2000	25598	35799	4	0	0	23773	28851	29189	3	10	6000	2000	4000	4000	10000	29133	29159	1	1	61001	1000	1000	2003	3	0	1	2002	1	1	2	2000	2	6	2	1	1091	12971	9318	6945	3090	6	45	19734	3173	3814	22	48	48	28252	15613	12959	13511	2000	4000	28945	29020	29009	29203	29598
66004	29003	234	1	22	0	19	1	0	1	12	92	0	0	0	0	4560	28876	2	2	15671	6000	4000	2000	4000	2000	25626	35809	6	0	0	23783	28929	28994	3	32	6000	2000	4000	4000	10000	28874	28935	1	1	61001	1000	1000	2003	2	6	1	2002	0	0	2	2000	2	0	2	1	2562	13193	9784	6903	3077	8	42	19836	3219	3815	22	44	48	28423	15794	13283	13625	2000	4000	28909	29018	28868	28991	28982
66004	28889	237	1	18	0	13	2	15	17	2256	1235	0	0	0	0	4534	29475	0	2	16260	6066	4028	2024	4056	2018	26426	36225	2	0	0	24119	29466	29656	103	398	6096	2030	4055	4054	10160	29956	29482	1	1	61001	1000	1000	2004	3	4	1	2002	0	0	8	2000	2	4	2	1	0	13371	9457	6954	3148	7	49	19881	3243	3815	29	49	44	28264	15532	12720	13640	2000	4000	28868	28820	28882	28863	28893
66004	28896	223	1	19	0	18	1	0	0	0	3	1	0	0	0	4758	28777	0	0	15587	6000	4000	2000	4000	2000	25614	35812	4	0	0	23826	28704	28888	3	10	6000	2000	4000	4000	10000	28852	28810	1	1	61001	1000	1000	2003	3	4	2	2002	0	1	2	2000	2	4	2	1	0	13391	9733	6958	3149	8	48	19657	3224	3817	20	45	43	28190	15499	12852	13264	2000	4000	28750	28784	28768	28967	28810
66004	28805	222	1	24	0	17	0	0	0	0	3	1	0	0	0	4799	28577	0	0	15347	6000	4000	2000	4000	2000	25610	35807	6	0	0	23802	28647	28668	3	10	6000	2000	4000	4000	10000	28738	28822	1	1	61001	1000	1000	2003	4	4	1	2003	0	0	5	2008	2	4	2	3	0	12957	9096	6797	3057	6	50	20883	3329	3813	20	49	45	29165	16429	13612	14293	2000	4000	30129	29839	29680	29976	30193
66004	30211	242	1	16	2	23	2	14	11	1320	1059	1	0	0	0	4689	29852	0	0	16122	6000	4044	2014	4036	2013	25875	35913	4	0	0	23927	29493	29841	47	178	6031	2004	4000	4000	10000	29628	29578	2	1	61001	1000	1000	2004	2	0	0	2002	1	1	5	2000	2	6	2	1	0	13111	9321	6971	3144	8	45	20187	3292	3812	26	52	52	28579	16261	13387	14077	2000	4000	29312	29501	29575	29574	29532
66004	29257	227	1	16	1	23	1	0	0	0	3	0	0	0	0	4615	29368	0	0	16150	6000	4001	2000	4000	2000	25621	35803	3	0	0	23803	29367	29521	3	10	6000	2000	4000	4000	10000	29301	29628	1	1	61001	1000	1000	2003	3	0	0	2002	0	0	2	2000	2	0	2	1	0	13131	9483	6890	3181	6	53	20135	3179	3816	20	42	47	28644	16483	13427	14162	2000	4000	29507	29477	29543	29421	29358
66004	29569	228	1	21	0	16	1	0	0	0	3	1	0	0	0	4609	29365	0	0	16288	6000	4000	2000	4000	2000	25612	35807	2	0	0	23835	29290	29505	3	27	6000	2000	4004	4000	10000	29557	29512	1	1	61001	1000	1000	2002	3	6	3	2002	0	0	2	2000	2	0	2	1	0	13081	9657	6931	3121	4	49	20476	3386	3817	21	46	52	28879	16274	13397	14268	2000	4000	29853	29834	29881	29812	29672

Count: 8

Code:

  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]
  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]
  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]
  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]
  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]
  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]
  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]
  st4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x6]

Initialization

  mov x7, x6
  mov x8, x6
  mov x9, x6
  mov x10, x6
  mov x11, x6
  mov x12, x6
  mov x13, x6

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 1.2676

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	mmu table walk data (08)	l2 tlb miss data (0b)	18	19	1e	1f	22	23	24	37	3f	46	49	4e	4f	51	schedule uop (52)	schedule int uop (53)	schedule simd uop (54)	schedule ldst uop (55)	dispatch int uop (56)	dispatch simd uop (57)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	ldst uops in schedulers (5b)	60	69	6d	6e	map stall dispatch (70)	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map simd uop (7e)	map int uop inputs (7f)	map ldst uop inputs (80)	map simd uop inputs (81)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst simd store (99)	inst ldst (9b)	9f	l1d tlb access (a0)	l1d tlb miss (a1)	l1d cache miss st (a2)	a4	ld unit uop (a6)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	af	bc	l1d cache miss st nonspec (c0)	c2	cd	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	? ldst retires (ed)	? simd retires (ee)	? int retires (ef)	f5	f6	f7	f8	fd
480207	98056	778	0	0	0	0	12	2	0	0	0	42914	102017	16	16	2356	6751	25	520186	100	360731	160000	100	320000	160000	500	4688482	5620027	0	101285	101556	99690	22696	3	22339	480100	200	160000	320000	200	320000	800000	101389	100544	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	9150	0	160002	0	0	2	160002	2	34	0	0	5109	1	17	1	1	100044	160000	320000	100	104863	100880	101738	101000	100080
480204	101840	801	0	0	0	0	0	8	1	0	0	41380	101056	16	16	2072	6568	25	523732	100	362692	160000	100	320000	160000	500	4620819	5617742	0	100107	101637	101771	22639	3	20468	480100	200	160000	320000	200	320000	800000	101023	102091	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	9123	0	160002	0	0	8	160002	2	36	0	0	5110	1	17	1	1	101166	160000	320000	100	100873	100745	100993	100549	101411
480204	102382	797	0	0	0	0	0	2	1	0	0	40689	100100	16	16	2146	6319	25	523919	100	360225	160000	100	320000	160000	500	4659806	5710863	0	101947	100810	100969	21790	3	19630	480100	200	160000	320000	200	320000	800000	100353	99338	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	10945	0	160000	0	0	2	160002	2	34	0	0	5109	1	17	1	1	100617	160000	320000	100	99992	101954	101135	101155	100334
480204	101060	781	0	0	0	0	12	2	0	1	0	42465	101054	16	16	2123	5951	25	521673	100	360055	160000	100	320000	160000	500	4681191	5596571	0	100765	101881	102354	21909	3	21094	480100	200	160000	320000	200	320000	800000	100664	102000	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	9501	0	160002	0	0	2	160002	2	34	0	0	5110	1	17	1	1	101099	160000	320000	100	99953	101364	102243	100929	102573
480204	100623	781	0	0	0	0	0	8	0	0	0	37267	100182	16	16	1869	6014	25	522356	100	360898	160000	100	320000	160000	500	4681372	5488836	0	101691	100744	100229	20043	3	20426	480100	200	160000	320000	200	320000	800000	101503	101093	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	10395	0	160002	1	0	0	160000	2	34	0	0	5109	1	17	1	1	101614	160000	320000	100	98196	100582	100712	99590	100350
480204	101659	790	2	0	0	0	0	3	0	1	0	40285	102303	16	16	1850	6254	36	522534	100	363219	160000	100	320000	160000	500	4602999	5554647	0	101050	101512	100571	21478	3	22016	480100	200	160000	320000	200	320000	800000	99829	100666	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	11248	0	160001	0	0	2	160002	2	34	0	0	5110	1	17	1	1	97362	160000	320000	100	100285	101077	102434	99186	101938
480204	99924	783	0	0	0	0	12	2	0	0	0	41828	100421	16	16	2238	6772	25	522262	100	363061	160000	100	320000	160000	500	4692705	5585248	0	101479	100122	101024	20471	3	20578	480100	200	160000	320000	200	320000	800000	100478	100845	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	11002	0	160002	0	0	14	160000	0	34	0	0	5110	1	17	1	1	100987	160000	320000	100	102386	102570	101239	101555	100893
480204	100265	784	0	0	0	0	0	8	0	1	0	41706	99296	0	16	2117	6146	25	518558	100	361734	160000	100	320000	160000	500	4659782	5569035	0	102140	101754	100599	21724	3	20674	480100	200	160000	320000	200	320000	800000	100990	101356	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	10523	0	160002	0	0	2	160002	2	0	0	0	5109	1	17	1	1	100919	160000	320000	100	102315	101037	100359	102037	100672
480204	101089	775	0	0	0	0	0	2	0	0	0	42452	101272	16	16	1886	6531	25	520320	100	359909	160000	100	320000	160000	500	4707041	5586579	0	100555	102366	99985	22713	3	21326	480100	200	160240	320480	202	320480	801200	101948	100130	3	1	80201	100	99	100	100	80000	80000	100	160127	2	34	10505	0	160122	0	0	1162	160122	2	34	0	0	5385	2	215	1	1	102087	160000	320000	100	99091	100459	100738	102260	102738
480204	100938	800	1	1	2	2	264	266	0	0	0	42261	101970	16	16	1657	6254	52	522543	100	360727	160120	100	320472	160216	500	4638632	5704417	0	102502	101132	101804	21199	3	21408	480100	200	160000	320000	200	320000	800000	100590	101895	1	1	80201	100	99	100	100	80000	80000	100	160000	0	34	11435	0	160002	0	0	8	160002	2	34	0	0	5109	1	17	1	1	101865	160000	320000	100	101099	103064	101116	100673	101538

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 1.2634

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	l1i tlb fill (04)	mmu table walk data (08)	09	l2 tlb miss data (0b)	18	19	1e	1f	22	23	37	3f	46	49	4e	4f	51	schedule uop (52)	schedule int uop (53)	schedule simd uop (54)	schedule ldst uop (55)	dispatch int uop (56)	dispatch simd uop (57)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	ldst uops in schedulers (5b)	60	61	69	6d	6e	map stall dispatch (70)	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map simd uop (7e)	map int uop inputs (7f)	map ldst uop inputs (80)	map simd uop inputs (81)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst simd store (99)	inst ldst (9b)	9f	l1d tlb access (a0)	l1d tlb miss (a1)	l1d cache miss st (a2)	a4	ld unit uop (a6)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	af	bc	l1d cache miss st nonspec (c0)	c2	cd	cf	d0	d2	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	? ldst retires (ed)	? simd retires (ee)	? int retires (ef)	f5	f6	f7	f8	fd
480027	103459	793	0	0	0	0	0	0	0	3	1	0	40938	101959	16	16	2235	7080	25	516455	10	360297	160000	10	320000	160000	50	4736862	5710331	0	0	101833	100688	100152	20528	3	21981	480010	20	160000	320000	20	320000	800000	101407	98702	1	1	80021	10	9	10	10	80000	80000	10	160000	0	43	9989	0	160000	0	0	3	160002	2	42	0	0	5019	0	0	5	17	6	6	100907	160000	320000	10	101691	100666	102185	102793	101006
480024	100601	784	0	0	0	0	0	0	0	3	0	0	41747	101287	16	16	1920	5642	25	519606	10	364009	160000	10	320000	160000	50	4622301	5732636	1	5	101443	101261	101639	20348	3	22298	480010	20	160000	320000	20	320000	800000	101336	100313	1	1	80021	10	9	10	10	80000	80000	10	160000	0	42	10921	0	160002	0	0	2	160002	2	42	0	0	5019	0	0	6	17	6	6	102237	160000	320000	10	100744	100223	101104	101386	100582
480024	102459	783	0	0	0	0	0	0	0	4	0	0	40204	101561	16	16	2127	5781	25	518881	10	361106	160060	10	320000	160000	50	4744188	5641011	0	0	98675	101638	99587	21303	3	20543	480010	20	160000	320000	20	320000	800000	100441	101619	1	1	80021	10	9	10	10	80000	80000	10	160000	0	42	10746	0	160000	0	0	2	160002	2	44	0	0	5019	0	0	6	17	5	6	100810	160000	320000	10	100798	100289	101340	101946	100247
480024	100628	779	0	0	0	0	0	1	12	3	0	0	39748	101032	16	16	2160	9932	25	519324	10	358969	160000	10	320000	160000	50	4743955	5581104	1	5	101039	100447	100795	22264	3	20686	480354	20	160000	320000	20	320000	800000	102647	101289	1	1	80021	10	9	10	10	80000	80000	10	160000	0	42	10429	0	160000	0	0	2	160002	2	43	0	0	5019	0	0	6	17	5	6	100972	160000	320000	10	100169	98966	101484	101430	101806
480024	101181	791	0	0	0	0	0	0	0	3	0	0	34409	99852	16	16	2209	6846	25	520120	10	361646	160000	10	320000	160000	50	4770823	5854848	0	5	101416	100191	99576	22369	3	19795	480010	20	160000	320000	20	320000	800000	102177	101757	1	1	80021	10	9	10	10	80000	80000	10	160000	0	0	11008	0	160002	0	0	5	160002	0	42	0	0	5019	0	0	6	17	5	7	101969	160000	320000	10	101888	102431	101659	100739	101745
480024	100221	789	0	0	0	0	0	0	0	3	0	0	40596	101995	16	16	2077	6319	25	522971	10	362015	160060	10	320236	160108	50	4684171	5532531	0	0	102194	101771	101710	21773	3	22051	480354	20	160120	322880	20	325520	813200	102823	101501	20	1	80021	10	9	10	10	80000	80000	10	160064	2	42	9355	2	160182	0	2	1047	160062	2	42	0	0	5032	0	0	5	35	7	5	100785	160000	320000	10	101720	100083	100952	101318	101648
480024	100501	787	0	0	0	0	0	0	0	3	0	0	40527	101521	16	16	2004	6659	25	519207	10	364384	160000	10	320000	160000	50	4643053	5654930	0	0	101611	99709	100218	22094	3	20750	480010	20	160000	320000	20	320000	800000	100184	100451	1	1	80021	10	9	10	10	80000	80000	10	160000	0	42	9281	0	160002	0	0	2	160002	2	42	0	1	5019	0	0	5	17	6	6	101372	160000	320000	10	99899	101240	100924	101662	101745
480024	99622	783	0	0	0	0	0	0	0	3	0	0	38971	100626	16	0	2355	6661	25	523202	10	362269	160000	10	320000	160000	50	4729649	5643215	0	0	99259	101456	101981	21483	3	22101	480010	20	160000	320000	20	320000	800000	101153	100871	1	1	80021	10	9	10	10	80000	80000	10	160000	0	42	10319	0	160002	0	0	5	160002	2	0	0	0	5019	0	0	5	17	6	5	102425	160000	320000	10	99115	102042	102165	101507	100961
480024	102330	777	0	0	0	0	0	0	0	3	0	0	42649	101127	16	0	2145	6000	25	520799	10	359796	160000	10	320000	160000	50	4672836	5512058	0	0	101248	100380	101438	20954	3	21490	480010	20	160000	320000	20	320000	800000	101869	100937	1	1	80021	10	9	10	10	80000	80000	10	160000	0	42	10166	0	160002	1	0	2	160002	2	42	0	0	5019	0	0	6	17	6	6	99496	160000	320000	10	100006	100704	102337	100541	102004
480024	101042	784	0	0	0	0	0	0	0	3	0	0	37656	101512	16	16	2462	6642	25	517810	10	360568	160000	10	320000	160000	50	4639576	5511575	0	0	100641	100600	102803	20451	3	20674	480010	20	160000	320000	20	320000	800000	101858	100780	1	1	80021	10	9	10	10	80000	80000	10	160000	0	0	10204	0	160002	0	0	2	160002	2	42	0	0	5019	0	0	5	17	6	5	100471	160000	320000	10	101740	101286	101976	100645	101268

ST4 (multiple, 8B)

Test 1: uops

1000 unrolls and 1 iteration

Test 2: throughput

100 unrolls and 100 iterations

1000 unrolls and 10 iterations