Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

STCLRH

Test 1: uops

Code:

  stclrh w0, [x6]
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 70 nops): 3.000

Issues: 3.005

Integer unit issues: 1.005

Load/store unit issues: 2.000

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)03mmu table walk instruction (07)09l2 tlb miss instruction (0a)0e0f1e223a3f43464951schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)5f6061696a6d6emap rewind (75)map stall (76)dispatch uop (78)79map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst int load (95)inst ldst (9b)9dl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)acafbbl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)cfd0d1d2l1i cache miss demand (d3)l1i tlb miss demand (d4)d5map dispatch bubble (d6)d9dadbddfetch restart (de)e0? int output thing (e9)eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
730053329324520120001017158343277310120649300510052000100020001099616922700492983832785327893103000010002000200040003273325791171001100010001200002410051000062004522160771203818441386710522267540484435155351324211005176481430116312200010003269632862326223276032587
73004328772462302300100516150326101002073830061006200010002000109891690960049299113257432743310300001000200020004000326452585117100110001000020000201003100003200450215561110890838336657452278340364440104750322991002173571466115166200010003281632596327683315732743
730043274025016020001001061743256510120817300510032000100020001095516828300492989932909328983103000110002000200040003274225791171001100010000200002210041000022002422163891211628435374111532274437734438114849323581005161181447315357200010003313232660328513326332839
7300433122244170180010231607433026111207623006100520001000200011090169881010492983532887325893103000010002000200040003280925811171001100010000200002310051000042005233164991230908061400513542261639144439164750323321006162771441814839200010003260132970328733321732701
73004326662481801400105215633327431102065430081005200010002000109531696381049301343307032688310300001000200020004000331162554117100110001000020000041005100002200522215586121112848540507472282640194434134552322861004164851406615158200010003327532850326953281133066
73004333102462001700100715992331171022078130061004200010002000110121702651649300573299332672310300001000200020004000327252616117100110001000020000031002100005200332215643117951812939068482292040624438154552322711005165361420714759200010003298333256329263323133109
730043281024421019101060055953314311221147300610062000100020001099716917910492993232866327003103000010002000200040003276025621171001100010000200003410041000052005333162461194418394394710492290040034433155148322431006167071416315349200010003261832731330303280332730
7300432805244210210010041558332604102205733007100320001000200011075168375104930114328833290131030000100020002000400032748259311710011000100002000034100310000520055331638011861082843890949228184059443284645324081005177611414016905200010003258332559326063323432707
73004331662451902000100605976330871122075430051005200010002000110641696890049298403272632815310300001000200020004000326542597117100110001000020000031004100004200363216546123361838038278542298039054435124648323411002164881440115876200010003285732721326113263432575
7300432810246150220010070596232731112206043003100620001000200010952169331310492989132696328193103000010002000200040003280825831171001100010000200002410021000042005522155281189028481406212552287041144433214757324111008158791465415460200010003276232745333323285232636

Test 2: throughput

Code:

  stclrh w0, [x6]
  add x6, x6, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0080

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)l2 tlb miss data (0b)0f191e1f2022293a3e3f404346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)67696a6b6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9e9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafb6bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
40206300752251011034113531080300372711817129462540427204112000020100200009120271412962265492698903007230075248203250334010020200200003020040000300756411202011009901001000010100100000010020034141927510111100191232084200582769722081301310116113007720335131320000201003008130081300813008130081
4020430080225111003402114810172030060191121112918384050220517200002010020000912555141299326049269960300803007924824325038401002020020000302004000030080721120201100990100100001010010000001002004115156671008610016423312642004926810821721401310116113007720339131320000201003008130076300813007630081
40204300582251100034058221019030065332191312921254045920442200002010020000912522141320126949269960300753009124819325038401002020020000302004000030080701120201100990100100001010010000001002005313180701006510010023212442008207410901801401310117113007720317131320000201003007630081300763008130081
4020430075225101003396921101003006518122291296225404492043820000201002000091269714129762504927000030080300752482232503340100202002000030200400003008070112020110099010010000101001000000100200461520295100941001741403060200602939411081301310116113007220358131320000201003008130081300813008130076
40204300752251000034057201014363006583261312946254042620427200002010020000912593141291123949269950300753008024819325038401002020020000302004000030080711120201100990100100001010010000001002004717503811009310017004238612005128214711981701310117113007220341131320000201003008130081300813008130076
4020430080225200003394102010603006003352512917254046120500200002010020000912574141299225749269950300723008024821325016401002020020000302004000030058591120201100990100100001010010000001002004313129761008710014124122462008137111601461401310116113007720353131320000201003008130076300813007630081
402043008022510000341011161011430065403149128982540474204682000020100200009124891412883244492699503007230080248203250384010020200200003020040000300807011202011009901001000010100100000010020043141084710068100113032165720080168131022611601310116113007720392131320000201003007630081300763008130081
40204300752252002034059371011430065183331312890254046420450200002010020000912418141288025149269860300753008024820325037401002020020000302004000030080711120201100990100100001010010000001002004014126711007610010114118932007525611501011421310117113007720320131320000201003007630081300763008130076
402043007522511100341416321017030065192241612862254042820455200002010020000912751141322925149269950300753008024817325037401002020020000302004000030080701120201100990100100001010010000001002003714135721007910015203632782008215210631071321310116113007720375131320000201003007630081300763008130081
4020430075226101003405118261017030065385221312875254045920462200002010020000912471141314625149269950300753008024816325038401002020020000302004000030080701120201100990100100001010010000101002006214215961007210017004236772007026511341001411310117113007720357131320000201003008130076300813007630081

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0071

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)09l2 tlb miss data (0b)0e0f18191e1f2022293a3e3f404346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)67696a6b6d6emap stall dispatch (70)rob full (74)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafb6bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
40026300712251110000034051212102503005642621912961254034120440200002001020000911945141280127149269910300713007124823032505140010200202000030020400003007167112002110901010000100101000001020068191737601006810031213606720078166146713017012701161130068203570920000200103007230195300733007230072
4002430071225222200003389113510143630056325111312915254032320324201052001020000911868141274723749269910300683007124826032505140010200202000030020400003007165112002110901010000100101000001020058224329601008510016414589620090163186721616212701161130068203309920000200103007230072300723007230072
40024300712262222000034041643101636300566512522129582540331203832000020010200009118451412832264492699103006830071248400325051400102002020000300204000030058641120021109010100001001010000010200491817560010074100153032327020094150147122217212701151130068203829920000200103005930072300723007230072
40024300712252000000034121338101903005640325191293025403502031320000200102000091207114128252694926991030068300712484003250514001020020200003002040000300716711200211090101000010010100000102004719966601006010020223766120068177125821817212702162130055203349920000200103007230072300723007230072
400243005822520200000344014280010030056415122212911254033920367200002001020000912130141277627349269910300713007124839032505140010200202000030020400003007167112002110901010000100101000001020072192056201005510019104310582004316513629417012702161230068202989920000200103007230072300723007230072
4002430071226222000003403143020140300562531214128852540310203012000020010200009120451412711237492699103007130071248430325051400102002020000300204000030072601120021109010100001001010000010200671617264010060100215340307220071144124519517212702162130068204419920000200103007230059300723007230072
40024300712252002000034021728101112300565111312129222540365203532000020010200009116031412743249492699103007130071248430325051400102002020000300204000030071651120021109010100001001010000010200511917671010083100253246106420083370164625016012701151130068203119920000200103007230072300723007230072
4002430071225222200003416132910122830056394188129112540327203252000020010200009120221412773241492699103007130071248400325052400102002020000300204000030071651120021109010100001001010000010200551815072010081100131353186320070054145517517012702162130068202939920000200103007230072300723007230072
40024300712252022000034201547102328300564612323129752540289203412000020010200009119101412150242492699103007130071248390325051400102002020000300204000030071671120021109010100001001010000010200471714349010083100241429105620055171167215116412701161130068203339920000200103007230072300723007230072
400243007122522220000344615371321240300563611911129412540411205542000020010200009120831412785261492699103006830071248380325051400102002020000300204000030071641120021109010100001001010000010200461717568010078100212236206120067067157522917212701161230068203489020000200103007230059300723007230072

Test 3: throughput

Code:

  stclrh w0, [x6]
  mov x7, 8

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 10.2183

retire uop (01)cycle (02)03mmu table walk data (08)09l2 tlb miss data (0b)0e0f18191e1f223a3f4346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696a6b6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)797bmap int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)c2branch cond mispred nonspec (c5)branch mispred nonspec (cb)cdcfd1d5map dispatch bubble (d6)ddfetch restart (de)e0e7? int output thing (e9)eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
302051102728240101100190671001023495129840872540357210452035810100200004690889498605103754910013401028191030921001716101811301007051105102032000520206400091047645221110201100990100100001001000001002000000221901810001008799301529558003101117172001600987321320708062000010100100854100967100555101557100024
3020499639755000000021459112103879010128534125412302087420239101002000046054425014885024949100856010318710352098034899391301008438421020020000202004000010274348111102011009901001000010010000010020000031019984100010099822984010524129310111722242252299670451996510620000101001029581027801004379817898903
3020410025075300000001875110210272431114869942540705207802024210100200004391862485582501694999381010321610520999463610142930100827106910200200002020040000102388460111020110099010010000100100000100200000022199271000100887229018920912531011171827016001050431520334002000010100999929971799406100163102090
3020410475477100000001846010110101819983723254051819517204721010020000445098148031390119499680901002119953896182697427301001120780102032000520206400091032784071110201100990100100001001000001002000000018335100000010211290701034312231011171719016009631527195011062000010100101257101737101082102429100702
30204101516772000000020929111975280010841462545518243662053310100200004541509496383401614992586097500987369646569917830100574902102032000520206400091040593521110201100990100100001001000001002000003128213561000000100392939097240222701117160016001026701119318062000010100102156101830102260102575103555
302041043537790000000221721111039503100819422540459197962080210100200004363042478527211654910237201040051027309770479675630100848873102032011220206400091066614721110201100990100100001001000001002000000201932210000009982285291107211931011171724016001012512619734106200001010010272910384910379110289798865
30204102124764000000021322101102558313168572425424192063420267101002000047684594983112011649973880101069101919100151610119230100726846102032000520206400091050715511110201100990100100001001000001002007903127196041000000108463035488670027011171720016009996817199801062000010100103791104101104525104798102368
302041028337770000000185301001013043120829132539856210642054310100200004370406486354802134910339901055571057561018567101241301007525321020320005202064000910539239311102011009901001000010010000010020000000202561000000956729556989012331011171616016001032672520251602000010100104029102704101474101632104329
30204104715765000000019807010108406211138275925401471916620650101002000037472714600927012549967970100700102230984598989073010068676310203200052020640009103732460111020110099010010000100100000100200000310193801000110968328653109461263201117181301600102630420645062000010100102603102993103526101990102672
302049748373300000001852400110304820138575525398832019320150101002000048433285080768019549101909010517810435798960799275301008796781020320005202064000910294148311102011009901001000010010000010020000002519288100011010049281078253115300111717001600104471202204710102000010100102407102026102949103379101300

1000 unrolls and 10 iterations

Result (median cycles for code): 11.1740

retire uop (01)cycle (02)03l2 tlb miss data (0b)0e0f18191e1f2223243a3f4346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696a6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)797bmap int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)c2cfd1d5map dispatch bubble (d6)ddfetch restart (de)e0e7? int output thing (e9)eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
300251119408390000023074110001116410121291617254194920505200001001020000551535253390600993491086651117371118111073923108001300102517100202000020020400001117013651110021109222811010000101000001020000031352351710001001612333485136371293106402721622111399024016002000010010111809111762111520111422111468
3002411154883600000230671100011176301213918772547121252382000510010200005486286532289119964910854611170811165110740831080453001023241002020000200204000011161051511100211092584410100001010000010200000313524144100010011897328141269513131064024216221112553236210102000010010111711111496111823112028111699
300241117948360000024372110001113570009193325432392391320072100102000055005955321074198349108480111542111419107388310796830010293210020200002002040000111533589111002110925692101000010100000102000003135226461000100126813226414117127310640162152211133412410610102000010010111848111711111951111764111699
3002411177283500000224941000011179631012919042542991251322011310010200005512781533978719464910856211151111129910734531079103001013181002020000200204000011187753711100211092800010100001010000010200000313422702100010012626337371597413031064002162211129042543710102000010010111558111367111398111670111950
3002411112483600000276931000011146309139146525466532549820025100102000055082485334097111084910850311169211160810730331081513001032121002020000200204000011156737911100211092861010100001010000010200000313721218100010013453342771260613131064026215221109481243321002000010010111689111767111724111968111600
30024111451835000002280610000111620113139215225449822494020004100102000054771655320148111434910880611199511172610746431079373001012221002020000200204000011186847911100211092546810100001010000010200000313624081100010013733352061539913031064002162211110112487010102000010010111716111707111520111699111839
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