Firestorm: STNP (Q) measurements

Code:

  stnp q0, q1, [x6]
  nop ; nop ; nop ; nop ; nop ; nop ; nop

Initialization

  mov x0, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 7 nops): 2.000

Issues: 2.000

Integer unit issues: 0.000

Load/store unit issues: 2.000

SIMD/FP unit issues: 0.000

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	l1d tlb fill (05)	mmu table walk data (08)	l2 tlb miss data (0b)	1e	1f	3d	3f	46	49	51	schedule uop (52)	schedule ldst uop (55)	dispatch ldst uop (58)	simd uops in schedulers (5a)	69	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map ldst uop (7d)	map ldst uop inputs (80)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst simd store (99)	inst ldst (9b)	l1d tlb access (a0)	l1d tlb miss (a1)	l1d cache miss st (a2)	ld unit uop (a6)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	af	bc	l1d cache miss st nonspec (c0)	l1d tlb miss nonspec (c1)	c2	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	st nt uop (e5)	? ldst retires (ed)	f5	f6	f7	f8	fd
9005	1165	9	1	1	1	0	14	4	1150	24	24	25	2000	2000	2000	10365	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2015	15	2000	1	2014	0	1	14	2000	14	2000	14	0	515	4	16	5	4	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	8	1	1	1	0	14	4	1150	25	24	25	2000	2000	2000	10406	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2014	15	2000	1	2014	0	1	14	2000	14	2000	14	1	513	5	16	5	4	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	9	1	0	0	0	14	4	1150	24	26	25	2000	2000	2000	10368	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2014	16	2000	0	2014	0	1	14	2000	14	2000	14	2	514	4	16	4	3	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	8	1	1	0	0	14	4	1150	24	24	25	2000	2000	2000	10455	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2014	15	2000	1	2014	0	1	14	2000	14	2000	14	0	514	5	47	4	5	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	8	1	1	0	0	14	4	1150	26	28	25	2000	2000	2000	10406	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2014	14	2000	2	2014	0	1	14	2000	14	2000	14	0	513	6	16	3	4	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	9	1	1	1	9	14	4	1150	24	24	25	2000	2000	2000	10359	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2014	16	2000	2	2014	0	1	14	2000	14	2000	14	1	513	3	16	3	4	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	8	1	0	0	3	14	4	1150	25	24	25	2000	2000	2000	10359	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2016	16	2000	1	2014	0	1	14	2000	14	2000	14	1	514	4	16	4	3	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	9	1	1	0	12	14	4	1150	24	24	25	2000	2000	2000	10359	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2015	14	2000	0	2014	0	1	14	2000	14	2000	14	0	513	3	16	3	4	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	9	1	1	0	0	14	4	1150	24	24	25	2000	2000	2000	10406	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2014	14	2000	2	2014	0	0	15	2000	14	2000	14	1	515	6	16	4	3	1162	2014	2000	1166	1166	1166	1166	1166
9004	1165	8	1	0	1	12	14	4	1150	25	24	25	2000	2000	2000	10359	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2016	14	2000	0	2014	0	0	14	2000	14	2000	14	0	515	6	16	4	5	1162	2014	2000	1166	1166	1166	1166	1166

Count: 8

Code:

  stnp q0, q1, [x6]
  stnp q0, q1, [x6]
  stnp q0, q1, [x6]
  stnp q0, q1, [x6]
  stnp q0, q1, [x6]
  stnp q0, q1, [x6]
  stnp q0, q1, [x6]
  stnp q0, q1, [x6]

Initialization

  mov x7, x6
  mov x8, x6
  mov x9, x6
  mov x10, x6
  mov x11, x6
  mov x12, x6
  mov x13, x6

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 1.0376

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	l1d tlb fill (05)	mmu table walk data (08)	09	l2 tlb miss data (0b)	18	19	1e	1f	3d	3f	46	49	4f	51	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	60	69	6d	6e	map stall dispatch (70)	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map int uop inputs (7f)	map ldst uop inputs (80)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst simd store (99)	inst ldst (9b)	9f	l1d tlb access (a0)	l1d tlb miss (a1)	l1d cache miss st (a2)	a4	ld unit uop (a6)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	af	bc	l1d cache miss st nonspec (c0)	l1d tlb miss nonspec (c1)	c2	branch cond mispred nonspec (c5)	branch mispred nonspec (cb)	cd	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	st nt uop (e5)	? int output thing (e9)	? ldst retires (ed)	? int retires (ef)	f5	f6	f7	f8	fd
160205	83016	622	1	1	0	1	0	0	0	14	297	82998	2376	2376	2969	25	160100	100	160017	100	160006	500	3822086	0	82988	83013	83013	62930	7	62965	160106	200	160016	200	320032	83013	83013	1	1	80201	100	99	100	100	80000	80000	100	160014	0	160000	1774	0	160000	0	0	0	160000	14	160000	14	0	1	1	1	5117	1	16	0	0	83007	160014	0	160000	100	83011	83016	83020	83016	83017
160204	83016	622	1	0	0	1	0	0	0	15	297	82998	2376	2376	2967	25	160100	100	160000	100	160006	500	3822086	1	82987	83010	83013	62932	7	62965	160106	200	160016	200	320032	83011	83013	1	1	80201	100	99	100	100	80000	80000	100	160014	16	160000	1778	0	160014	0	0	14	160000	14	160000	14	0	1	1	1	5117	0	16	0	0	83010	160014	0	160000	100	83018	83017	83014	83014	83011
160204	83010	622	1	1	1	1	0	0	0	14	297	82998	2376	2376	2670	25	160100	100	160000	100	160000	500	3846926	1	82988	83013	83013	62926	3	62971	160100	200	160000	200	320000	83013	83015	1	1	80201	100	99	100	100	80000	80000	100	160014	16	160000	1778	1	160014	0	0	14	160000	14	160000	14	0	0	0	0	5110	1	16	1	1	83010	160014	0	160000	100	83014	83014	83020	83016	83014
160204	83013	622	1	1	0	0	0	0	0	14	297	83000	2376	2376	2669	25	160100	100	160000	100	160000	500	3822060	1	82990	83013	83011	62923	3	62968	160100	200	160000	200	320000	83015	83011	1	1	80201	100	99	100	100	80000	80000	100	160014	15	160000	1776	0	160014	0	1	14	160000	14	160000	14	0	0	0	0	5110	1	16	1	1	83010	160014	0	160000	100	83017	83014	83016	83012	83014
160204	83013	622	1	1	1	1	0	0	0	14	297	82998	2376	2376	2669	25	160100	100	160000	100	160000	500	3822060	1	82991	83013	83010	62924	3	62968	160100	200	160000	200	320000	83015	83011	1	1	80201	100	99	100	100	80000	80000	100	160014	16	160016	1480	1	160014	0	0	14	160000	14	160000	14	3	0	0	0	5110	1	16	1	1	83007	160014	0	160000	100	83014	83014	83016	83014	83014
160204	83013	622	1	0	0	1	0	0	0	14	297	82995	2376	2376	2966	25	160100	100	160000	100	160000	500	3822060	1	82986	83013	83010	62925	3	62969	160100	200	160000	200	320000	83015	83012	1	1	80201	100	99	100	100	80000	80000	100	160014	16	160000	1776	0	160014	0	0	14	160000	14	160000	14	1	0	0	0	5110	1	16	1	1	83013	160014	0	160000	100	83022	83018	83014	83011	83014
160204	83013	622	1	1	1	2	0	1	0	366	306	82998	2369	2376	3004	25	160109	100	160000	100	160000	500	3822060	1	82988	83013	83013	62926	11	62971	160100	200	160000	200	320000	83013	83013	1	1	80201	100	99	100	100	80000	80000	100	160014	17	160000	1778	0	160017	0	0	14	160000	14	160000	14	0	0	0	0	5110	1	16	1	1	83010	160014	0	160000	100	83016	83014	83020	83018	83014
160204	83013	622	1	0	1	1	0	0	0	14	297	82998	2376	2376	2669	25	160100	100	160000	100	160000	500	3822060	1	82988	83013	83016	62923	3	62969	160100	200	160000	200	320000	83013	83010	1	1	80201	100	99	100	100	80000	80000	100	160014	16	160000	1778	0	160014	0	1	14	160000	14	160000	14	3	0	0	0	5110	1	16	1	1	83010	160028	0	160000	100	83976	83014	84910	83019	83014
160204	84014	622	1	1	0	1	0	0	0	14	297	82984	2376	2376	3074	304	160100	100	160000	100	160000	500	3821384	1	82973	82998	82999	62912	3	62957	160100	200	160000	200	320000	82999	82998	1	1	80201	100	99	100	100	80000	80000	100	160014	14	160000	1776	1	160014	0	1	14	160000	0	160000	0	0	0	0	0	5110	1	16	1	1	82996	160000	0	160000	100	83014	83012	83016	83016	83012
160204	83011	622	1	0	0	1	0	0	0	14	297	82984	2376	2376	2958	25	160100	100	160000	100	160000	500	3821384	0	82974	82999	82998	62911	3	62956	160100	200	160000	200	320000	82998	82999	1	1	80201	100	99	100	100	80000	80000	100	160014	0	160008	1774	0	160000	0	0	0	160000	0	160000	0	0	0	0	0	5110	1	16	1	1	82996	160000	0	160000	100	83014	83003	83002	82999	83000

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 1.0375

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	mmu table walk data (08)	18	1e	3d	3f	46	49	4f	51	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	60	69	6b	6d	6e	map stall dispatch (70)	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map int uop inputs (7f)	map ldst uop inputs (80)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst simd store (99)	inst ldst (9b)	9f	l1d tlb access (a0)	l1d cache miss st (a2)	a4	ld unit uop (a6)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	af	bc	l1d cache miss st nonspec (c0)	c2	branch mispred nonspec (cb)	cf	d0	d2	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	st nt uop (e5)	ec	? ldst retires (ed)	? int retires (ef)	f5	f6	f7	f8	fd
160025	82998	622	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821384	1	82973	0	82998	82999	62934	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82995	160000	0	160000	10	82999	83000	82999	83000	82999
160024	82998	621	0	0	0	297	82983	2368	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82974	0	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1479	0	160000	0	0	0	160000	0	160000	0	0	5020	0	2	1	16	1	1	82995	160000	0	160000	10	83000	82999	83000	82999	82999
160024	82998	622	0	0	0	297	82984	2376	2376	2958	25	160010	10	160000	10	160000	50	3821384	1	82973	0	82998	82999	62934	3	62979	160010	20	160000	20	320000	82999	82998	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82996	160000	0	160000	10	82999	83000	82999	83000	82999
160024	82998	622	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82974	0	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82995	160000	0	160000	10	83000	82999	83000	82999	83000
160024	82999	622	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82974	0	82999	82998	62933	3	62978	160010	20	160000	20	320000	82999	82998	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82996	160000	0	160000	10	82999	83000	82999	83000	82999
160024	82998	622	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	0	82974	0	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1479	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82996	160000	0	160000	10	83000	82999	83000	82999	83000
160024	82999	622	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82973	0	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82996	160000	0	160000	10	82999	83000	82999	83000	82999
160024	82998	621	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82974	0	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82996	160000	0	160000	10	82999	83000	82999	83000	82999
160024	82998	622	0	0	0	297	82983	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	0	82974	0	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82996	160000	0	160000	10	82999	83000	82999	83000	82999
160024	82998	622	0	0	0	297	82983	2376	2376	2958	25	160010	10	160000	10	160000	50	3821384	0	82973	0	82998	82999	62934	3	62979	160010	20	160000	20	320000	82999	82998	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1479	0	160000	0	0	0	160000	0	160000	0	0	5020	0	0	1	16	1	1	82996	160000	0	160000	10	82999	83000	82999	83000	82999

STNP (Q)

Test 1: uops

1000 unrolls and 1 iteration

Test 2: throughput

100 unrolls and 100 iterations

1000 unrolls and 10 iterations