Firestorm: STNP (signed offset, Q) measurements

Code:

  stnp q0, q1, [x6, #0x10]
  nop ; nop ; nop ; nop ; nop ; nop ; nop

Initialization

  mov x0, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 7 nops): 2.000

Issues: 2.000

Integer unit issues: 0.000

Load/store unit issues: 2.000

SIMD/FP unit issues: 0.000

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	l1d tlb fill (05)	mmu table walk data (08)	l2 tlb miss data (0b)	1e	1f	3a	3d	3f	46	49	51	schedule uop (52)	schedule ldst uop (55)	dispatch ldst uop (58)	simd uops in schedulers (5a)	60	69	6d	6e	map rewind (75)	map stall (76)	dispatch uop (78)	map ldst uop (7d)	map ldst uop inputs (80)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst simd store (99)	inst ldst (9b)	l1d tlb access (a0)	l1d tlb miss (a1)	l1d cache miss st (a2)	ld unit uop (a6)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	af	bc	l1d cache miss st nonspec (c0)	l1d tlb miss nonspec (c1)	c2	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	st nt uop (e5)	? ldst retires (ed)	f5	f6	f7	f8	fd
9005	1165	8	0	0	0	0	0	3	4	1150	26	26	25	2000	2000	2000	10000	0	1140	1222	1167	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	519	8	16	8	8	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	8	0	0	0	0	0	3	4	1150	27	26	25	2000	2000	2000	10000	0	1140	1201	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	521	8	16	8	7	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	9	0	0	0	0	0	3	4	1150	26	26	25	2000	2000	2000	10000	0	1140	1203	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	519	6	16	8	8	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	8	0	0	0	0	0	3	4	1150	26	26	25	2000	2000	2000	10000	0	1140	1201	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	521	7	16	8	8	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	8	0	0	0	0	0	3	4	1150	26	27	25	2000	2000	2000	10000	0	1140	1201	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	521	8	16	8	7	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	8	0	0	0	0	0	3	4	1150	26	26	25	2000	2000	2000	10000	0	1140	1201	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	521	7	16	8	8	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	9	0	0	0	0	0	3	4	1150	26	27	25	2000	2000	2000	10000	0	1140	1204	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	521	7	16	8	8	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	8	0	0	0	0	0	3	4	1150	26	26	25	2000	2000	2000	10000	0	1140	1165	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	521	6	16	7	7	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	8	0	0	0	0	0	3	4	1150	27	26	25	2000	2000	2000	10000	0	1140	1202	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	0	519	8	16	8	8	1162	2000	2000	1166	1166	1166	1166	1166
9004	1165	9	0	0	0	0	0	3	4	1150	26	26	25	2000	2000	2000	10000	0	1140	1201	1165	3	23	2000	2000	4000	1165	1165	1	1	8001	1000	1000	2000	0	2000	0	2000	0	0	0	2000	0	2000	0	1	521	7	16	7	6	1162	2000	2000	1166	1166	1166	1166	1166

Count: 8

Code:

  stnp q0, q1, [x6, #0x10]
  stnp q0, q1, [x6, #0x10]
  stnp q0, q1, [x6, #0x10]
  stnp q0, q1, [x6, #0x10]
  stnp q0, q1, [x6, #0x10]
  stnp q0, q1, [x6, #0x10]
  stnp q0, q1, [x6, #0x10]
  stnp q0, q1, [x6, #0x10]

Initialization

  mov x7, x6
  mov x8, x6
  mov x9, x6
  mov x10, x6
  mov x11, x6
  mov x12, x6
  mov x13, x6

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 1.0369

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	mmu table walk data (08)	l2 tlb miss data (0b)	18	19	1e	1f	3d	3f	46	49	4f	51	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	60	69	6d	6e	map stall dispatch (70)	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map int uop inputs (7f)	map ldst uop inputs (80)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst simd store (99)	inst ldst (9b)	9f	l1d tlb access (a0)	l1d tlb miss (a1)	l1d cache miss st (a2)	a4	ld unit uop (a6)	st unit uop (a7)	l1d cache writeback (a8)	a9	ac	af	l1d cache miss st nonspec (c0)	c2	branch mispred nonspec (cb)	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	st nt uop (e5)	? int output thing (e9)	? ldst retires (ed)	? int retires (ef)	f5	f6	f7	f8	fd
160205	82948	622	0	0	0	0	0	0	293	82934	2344	2344	2618	25	160100	100	160000	100	160000	500	3818984	0	82923	82948	82952	62861	3	62907	160100	200	160000	200	320000	82949	82948	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1454	0	160000	0	0	0	160000	160000	0	0	5110	1	16	1	1	82945	160000	0	160000	100	82950	82949	82950	82949	82950
160204	82949	621	0	0	0	0	18	0	293	82934	2344	2344	2618	25	160100	100	160000	100	160000	500	3818984	0	82923	82949	82949	62864	3	62907	160100	200	160000	200	320000	82949	82948	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1454	0	160000	0	0	3	160000	160000	0	0	5110	1	16	1	1	82946	160000	0	160000	100	82949	82950	83010	82949	82950
160204	82949	621	0	0	0	0	0	0	293	82933	2344	2344	2908	25	160100	100	160000	100	160000	500	3818984	0	83079	83885	82949	62864	11	63868	160406	200	160000	200	320000	82949	82948	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1744	0	160000	1	0	3	160000	160000	0	0	5110	1	16	1	1	82946	160000	0	160000	100	82949	82950	82949	82950	82949
160204	82948	622	0	0	0	0	12	0	293	82934	2344	2344	2618	25	160100	100	160000	100	160000	500	3821110	0	82923	82949	82949	64396	3	62907	160100	200	160000	200	320000	82949	82948	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1454	0	160000	0	0	3	160000	160000	0	0	5110	1	16	1	1	82945	160000	0	160000	100	82950	82949	82950	82949	82950
160204	82949	621	0	0	0	0	564	0	293	82933	2344	2344	2908	25	160100	100	160000	100	160000	500	3818984	1	82923	82949	82957	62862	3	62906	160100	200	160000	200	320000	82948	82949	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1744	0	160000	0	0	0	160000	160000	0	0	5110	1	16	1	1	82945	160000	0	160000	100	82950	82949	82950	82949	82950
160204	82949	621	0	0	0	0	21	0	293	82933	2344	2344	2908	25	160100	100	160000	100	160000	500	3818984	1	82923	82948	82954	62861	3	62906	160100	200	160000	200	320000	82948	82949	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1744	0	160000	0	0	0	160000	160000	0	0	5110	1	16	1	1	82945	160000	0	160000	100	82950	82949	82950	82949	82950
160204	82949	621	0	0	0	0	0	0	293	82934	2344	2344	2618	25	160100	100	160000	100	160000	500	3818936	0	82923	82949	82955	62862	3	62907	160100	200	160000	200	320000	82949	82948	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1454	0	160000	0	0	0	160000	160000	0	0	5110	1	16	1	1	82946	160000	0	160000	100	82949	82950	82949	82950	82949
160204	82948	622	0	0	0	0	0	0	293	82933	2344	2344	2908	25	160100	100	160000	100	160000	500	3818984	1	82923	82957	82949	62862	3	62907	160100	200	160000	200	320000	82948	82949	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1454	0	160000	0	0	0	160000	160000	0	0	5110	1	16	1	1	82945	160000	0	160000	100	82949	82950	82949	82950	82949
160204	82948	621	0	0	0	0	0	0	293	82934	2344	2344	2618	25	160100	100	160000	100	160000	500	3818936	1	82924	82948	82952	63237	3	62906	160100	200	160000	200	320000	82948	82949	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1744	0	160000	0	0	0	160000	160000	0	0	5110	1	16	1	1	82946	160000	0	160000	100	82949	82950	82949	82950	82949
160204	82948	621	0	0	0	0	0	0	293	82934	2344	2344	2618	25	160100	100	160000	100	160000	500	3818936	1	82924	82949	82953	62862	3	62907	160100	200	160000	200	320000	82949	82948	1	1	80201	100	99	100	100	80000	80000	100	160000	0	160000	1454	0	160000	0	0	0	160000	160000	0	0	5110	1	16	1	1	82946	160000	0	160000	100	82949	82950	82949	82950	82949

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 1.0375

All non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	03	l2 tlb miss data (0b)	18	19	1e	1f	3d	3f	46	49	4f	51	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	60	69	6d	6e	map stall dispatch (70)	map rewind (75)	map stall (76)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map int uop inputs (7f)	map ldst uop inputs (80)	82	83	flush restart other nonspec (84)	85	inst all (8c)	inst branch (8d)	inst branch taken (90)	inst branch cond (94)	inst int alu (97)	inst simd store (99)	inst ldst (9b)	9f	l1d tlb access (a0)	l1d cache miss st (a2)	a4	st unit uop (a7)	l1d cache writeback (a8)	ac	af	l1d cache miss st nonspec (c0)	c2	branch mispred nonspec (cb)	cf	d5	map dispatch bubble (d6)	dd	fetch restart (de)	e0	st nt uop (e5)	? ldst retires (ed)	? int retires (ef)	f5	f6	f7	f8	fd
160025	82998	621	0	0	0	0	0	297	82983	2376	2376	2663	25	160010	10	160000	10	160000	50	3821384	1	82973	82998	82999	62934	3	62978	160010	20	160000	20	320000	82999	82998	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	160000	0	0	160000	160000	0	0	5020	3	16	3	3	82996	160000	160000	10	82999	83000	82999	83000	83000
160024	82999	621	0	0	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82974	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1479	160000	0	0	160000	160000	0	0	5020	3	16	3	3	82996	160000	160000	10	82999	83000	82999	83000	82999
160024	82998	621	0	0	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82974	82999	82998	62933	3	62979	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	160000	0	195	160000	160000	0	0	5020	3	16	3	3	82995	160000	160000	10	83000	82999	83000	83023	83000
160024	82999	622	0	0	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82974	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	160000	0	0	160000	160000	0	0	5020	3	16	3	3	82996	160000	160000	10	83000	82999	83000	82999	83000
160024	82999	622	0	0	1	0	0	297	82983	2376	2376	2958	25	160010	10	160000	10	160000	50	3821384	1	82973	82998	82999	62934	3	62979	160010	20	160000	20	320000	82999	82998	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1479	160000	0	0	160000	160000	0	0	5020	3	16	3	2	82996	160000	160000	10	82999	83000	82999	83000	82999
160024	82998	622	0	0	0	0	0	297	82983	2376	2376	2958	25	160010	10	160000	10	160000	50	3821384	1	82974	82999	82998	62933	3	62978	160010	20	160000	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160009	160008	1774	160000	0	0	160000	160000	0	0	5020	3	16	2	3	82995	160003	160000	10	83000	82999	83000	82999	83000
160024	82999	622	0	0	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	1	82973	82998	82999	62934	3	62979	160010	20	160000	20	320000	83058	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1479	160000	0	0	160000	160000	0	0	5020	3	16	3	2	82995	160000	160000	10	83000	82999	83000	82999	82999
160024	82998	639	0	0	0	183	0	394	113153	2246	2251	14520	17518	160361	11	160114	10	161863	50	4050718	1	82973	82998	82999	62934	3	62979	160010	20	160072	20	320000	82998	82999	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	160000	0	0	160000	160000	0	0	5020	3	16	3	3	82996	160000	160000	10	82999	83000	82999	83000	82999
160024	82998	622	0	0	0	0	0	297	82983	2376	2376	2958	25	160010	10	160000	10	160000	50	3821384	0	82973	82998	82999	62934	3	62979	160010	20	160000	20	320000	82999	82998	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1774	160000	0	0	160000	160000	0	0	5020	3	16	2	3	82995	160000	160000	10	83000	82999	83000	82999	83000
160024	82999	621	1	0	0	0	0	297	82984	2376	2376	2663	25	160010	10	160000	10	160000	50	3821336	0	82973	82998	82999	62934	3	62979	160010	20	160000	20	320000	82999	82998	1	1	80021	10	9	10	10	80000	80000	10	160000	160000	1479	160000	0	0	160000	160000	0	0	5020	2	16	3	3	82995	160000	160000	10	83000	82999	83000	82999	83000

STNP (signed offset, Q)

Test 1: uops

1000 unrolls and 1 iteration

Test 2: throughput

100 unrolls and 100 iterations

1000 unrolls and 10 iterations