Apple Microarchitecture Research by Dougall Johnson M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions M1/A14 E-core (Icestorm): Overview | Base Instructions | SIMD and FP Instructions
Code:
strb w0, [x6, #8]!
(no loop instructions)
Retires: 1.000
Issues: 2.000
Integer unit issues: 1.000
Load/store unit issues: 1.000
SIMD/FP unit issues: 0.000
| retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | 09 | l2 tlb miss data (0b) | 1e | 1f | 20 | 22 | 3a | 3e | 3f | 40 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 61 | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map ldst uop (7d) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst int store (96) | inst ldst (9b) | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | l1d cache miss ld (a3) | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | aa | ab | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | cf | d0 | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 1005 | 1040 | 7 | 0 | 0 | 0 | 0 | 12 | 4 | 15 | 1 | 7 | 0 | 1025 | 8 | 0 | 0 | 5 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50778 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1020 | 0 | 45 | 3 | 13 | 1001 | 1 | 0 | 20 | 12 | 6 | 1012 | 7 | 39 | 7 | 0 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 7 | 0 | 0 | 0 | 0 | 12 | 4 | 14 | 1 | 9 | 4 | 1025 | 9 | 2 | 2 | 2 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50778 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1038 | 0 | 63 | 3 | 17 | 1000 | 2 | 0 | 18 | 12 | 0 | 1014 | 0 | 47 | 0 | 0 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 8 | 0 | 0 | 0 | 0 | 6 | 4 | 14 | 1 | 5 | 20 | 1025 | 0 | 0 | 2 | 2 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50778 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1018 | 0 | 55 | 3 | 16 | 1000 | 1 | 0 | 14 | 12 | 3 | 1016 | 0 | 63 | 0 | 0 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 8 | 0 | 0 | 0 | 0 | 21 | 6 | 16 | 1 | 6 | 0 | 1025 | 0 | 0 | 2 | 3 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50778 | 45824 | 1 | 0 | 1090 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1032 | 0 | 64 | 4 | 15 | 1001 | 1 | 0 | 14 | 12 | 3 | 1000 | 1 | 31 | 0 | 0 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 7 | 0 | 0 | 0 | 0 | 0 | 4 | 20 | 1 | 7 | 0 | 1025 | 9 | 2 | 5 | 2 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50778 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1033 | 0 | 87 | 7 | 20 | 1000 | 1 | 0 | 16 | 6 | 0 | 1015 | 0 | 39 | 0 | 0 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 7 | 0 | 0 | 0 | 0 | 0 | 4 | 14 | 1 | 4 | 0 | 1025 | 10 | 0 | 5 | 2 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50778 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1036 | 0 | 55 | 2 | 16 | 1001 | 1 | 0 | 16 | 6 | 3 | 1000 | 0 | 55 | 0 | 0 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 8 | 0 | 0 | 0 | 0 | 6 | 6 | 14 | 1 | 5 | 0 | 1025 | 9 | 0 | 2 | 2 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50778 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1018 | 0 | 60 | 2 | 16 | 1000 | 1 | 0 | 14 | 6 | 3 | 1018 | 0 | 39 | 0 | 0 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 8 | 0 | 0 | 0 | 0 | 0 | 4 | 14 | 1 | 5 | 0 | 1025 | 11 | 5 | 2 | 2 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50778 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1039 | 8 | 78 | 5 | 14 | 1007 | 1 | 0 | 12 | 0 | 7 | 1000 | 7 | 39 | 7 | 1 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 8 | 1 | 1 | 1 | 1 | 0 | 10 | 19 | 1 | 4 | 0 | 1025 | 12 | 2 | 2 | 6 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50762 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1017 | 9 | 47 | 0 | 13 | 1007 | 1 | 0 | 13 | 6 | 10 | 1013 | 7 | 39 | 7 | 2 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
| 1004 | 1040 | 8 | 1 | 1 | 1 | 0 | 0 | 10 | 13 | 1 | 6 | 0 | 1025 | 10 | 4 | 1 | 5 | 25 | 2000 | 1000 | 1000 | 1000 | 1000 | 50762 | 45824 | 1 | 0 | 1040 | 1040 | 824 | 3 | 898 | 2000 | 1000 | 2000 | 1040 | 124 | 1 | 1 | 1001 | 1000 | 1000 | 1040 | 10 | 63 | 5 | 1 | 1007 | 0 | 2 | 19 | 12 | 10 | 1016 | 7 | 47 | 7 | 0 | 73 | 0 | 3 | 16 | 3 | 3 | 1037 | 1000 | 1000 | 1000 | 1041 | 1041 | 1041 | 1041 | 1041 |
Code:
strb w0, [x6, #8]!
(fused SUBS/B.cc loop)
Result (median cycles for code): 1.0040
| retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | l2 tlb miss data (0b) | 18 | 19 | 1e | 1f | 20 | 22 | 23 | 24 | 29 | 3a | 3c | 3e | 3f | 40 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int store (96) | inst int alu (97) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | l1d cache miss ld (a3) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | aa | ab | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | branch cond mispred nonspec (c5) | branch mispred nonspec (cb) | cd | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | eb | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 10209 | 10040 | 75 | 2 | 0 | 0 | 0 | 0 | 2010 | 119 | 841 | 1 | 0 | 0 | 776 | 73 | 1 | 92 | 10025 | 818 | 111 | 106 | 57 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522067 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 122 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10920 | 28 | 1387 | 351 | 0 | 669 | 10275 | 254 | 0 | 926 | 40 | 870 | 10948 | 35 | 1103 | 21 | 0 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 2 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10040 | 75 | 3 | 0 | 0 | 0 | 0 | 2211 | 120 | 835 | 1 | 0 | 0 | 776 | 85 | 0 | 108 | 10025 | 805 | 115 | 106 | 57 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522047 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 122 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10906 | 28 | 1245 | 369 | 0 | 686 | 10287 | 261 | 4 | 888 | 36 | 910 | 10912 | 38 | 1152 | 28 | 0 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 3 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10040 | 75 | 4 | 4 | 0 | 0 | 0 | 2061 | 110 | 806 | 1 | 0 | 0 | 768 | 82 | 1 | 156 | 10025 | 781 | 113 | 99 | 52 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 521987 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 123 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10930 | 28 | 1285 | 376 | 0 | 659 | 10281 | 282 | 0 | 894 | 32 | 882 | 10913 | 34 | 1192 | 21 | 0 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 0 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10146 | 75 | 4 | 0 | 0 | 0 | 0 | 2076 | 82 | 813 | 1 | 0 | 0 | 40 | 86 | 0 | 124 | 10025 | 814 | 96 | 124 | 61 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522075 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 6 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 122 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10930 | 29 | 1397 | 387 | 0 | 673 | 10287 | 251 | 4 | 932 | 42 | 900 | 10883 | 40 | 1252 | 21 | 12 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 3 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10040 | 75 | 4 | 0 | 0 | 2 | 0 | 2241 | 104 | 808 | 1 | 0 | 0 | 784 | 75 | 0 | 160 | 10025 | 798 | 84 | 88 | 44 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522013 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 123 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10918 | 28 | 1248 | 376 | 0 | 698 | 10275 | 277 | 0 | 910 | 36 | 940 | 10913 | 41 | 1122 | 28 | 0 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 7 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10040 | 75 | 4 | 0 | 0 | 0 | 0 | 1947 | 116 | 790 | 1 | 0 | 0 | 744 | 83 | 2 | 112 | 10025 | 806 | 106 | 91 | 54 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522035 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 122 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10927 | 28 | 1271 | 375 | 0 | 678 | 10279 | 301 | 0 | 910 | 32 | 854 | 10935 | 35 | 1097 | 28 | 0 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 1 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10040 | 75 | 4 | 0 | 4 | 0 | 0 | 2397 | 111 | 845 | 1 | 0 | 0 | 760 | 84 | 0 | 100 | 10025 | 773 | 93 | 95 | 53 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522115 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 122 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10921 | 24 | 1341 | 359 | 0 | 662 | 10287 | 309 | 0 | 902 | 32 | 983 | 10940 | 37 | 1168 | 14 | 3 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 1 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10040 | 75 | 3 | 3 | 0 | 0 | 0 | 2175 | 105 | 786 | 1 | 0 | 0 | 776 | 81 | 2 | 112 | 10025 | 756 | 91 | 81 | 64 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522005 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 122 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10899 | 21 | 1411 | 339 | 0 | 658 | 10266 | 250 | 0 | 908 | 32 | 907 | 10903 | 29 | 1099 | 14 | 6 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 2 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10040 | 75 | 3 | 0 | 3 | 0 | 0 | 2115 | 110 | 798 | 1 | 0 | 0 | 744 | 85 | 3 | 100 | 10025 | 820 | 83 | 90 | 55 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522083 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 123 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10964 | 21 | 1339 | 382 | 0 | 644 | 10287 | 266 | 3 | 904 | 34 | 896 | 10944 | 24 | 1158 | 21 | 0 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 7 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10204 | 10040 | 75 | 3 | 3 | 3 | 0 | 0 | 2094 | 116 | 816 | 1 | 0 | 0 | 792 | 90 | 0 | 112 | 10025 | 784 | 88 | 104 | 60 | 25 | 20100 | 10100 | 10000 | 10100 | 10000 | 522003 | 468824 | 49 | 6960 | 10040 | 10040 | 8674 | 3 | 8747 | 20100 | 200 | 10000 | 200 | 20000 | 10040 | 123 | 1 | 1 | 10201 | 100 | 99 | 100 | 10000 | 100 | 10000 | 100 | 10927 | 21 | 1263 | 381 | 0 | 688 | 10250 | 292 | 0 | 920 | 32 | 983 | 10904 | 28 | 1127 | 21 | 0 | 0 | 0 | 0 | 710 | 1 | 17 | 1 | 1 | 10037 | 10000 | 1 | 0 | 10000 | 10100 | 10041 | 10041 | 10041 | 10041 | 10041 |
Result (median cycles for code): 1.0040
| retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | 09 | l2 tlb miss data (0b) | 1e | 1f | 20 | 22 | 29 | 3a | 3c | 3e | 3f | 40 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int store (96) | inst int alu (97) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | l1d cache miss ld (a3) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | aa | ab | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ea | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 10029 | 10040 | 75 | 2 | 2 | 2 | 0 | 2121 | 87 | 811 | 1 | 752 | 92 | 0 | 100 | 10025 | 805 | 68 | 112 | 51 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521049 | 468824 | 0 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10944 | 21 | 1330 | 394 | 0 | 724 | 10271 | 266 | 0 | 928 | 36 | 825 | 10908 | 29 | 1141 | 14 | 0 | 640 | 3 | 16 | 3 | 3 | 10037 | 10000 | 0 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 76 | 1 | 0 | 0 | 0 | 2058 | 94 | 828 | 1 | 720 | 85 | 0 | 108 | 10025 | 823 | 97 | 85 | 48 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521049 | 468824 | 1 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10907 | 7 | 1303 | 371 | 0 | 715 | 10266 | 241 | 2 | 958 | 46 | 754 | 10931 | 18 | 1267 | 7 | 2 | 640 | 2 | 16 | 3 | 3 | 10037 | 10000 | 1 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 75 | 1 | 0 | 0 | 1 | 1896 | 116 | 850 | 1 | 728 | 90 | 1 | 116 | 10025 | 788 | 89 | 96 | 57 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521059 | 468824 | 1 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10923 | 14 | 1161 | 373 | 0 | 661 | 10261 | 288 | 0 | 924 | 46 | 813 | 10945 | 29 | 1226 | 7 | 0 | 640 | 3 | 16 | 3 | 3 | 10037 | 10000 | 0 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 76 | 1 | 1 | 1 | 0 | 2094 | 88 | 811 | 1 | 768 | 83 | 0 | 120 | 10025 | 829 | 111 | 97 | 63 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521049 | 468824 | 1 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10889 | 7 | 1271 | 380 | 0 | 672 | 10277 | 282 | 0 | 905 | 42 | 852 | 10893 | 18 | 1179 | 7 | 0 | 640 | 2 | 16 | 3 | 3 | 10037 | 10000 | 2 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 75 | 1 | 0 | 0 | 0 | 2001 | 86 | 832 | 1 | 760 | 84 | 2 | 136 | 10025 | 817 | 102 | 89 | 41 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521073 | 468824 | 0 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10950 | 7 | 1404 | 335 | 0 | 692 | 10264 | 267 | 2 | 909 | 36 | 838 | 10963 | 21 | 1239 | 7 | 0 | 640 | 3 | 16 | 2 | 3 | 10037 | 10000 | 1 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 75 | 1 | 0 | 1 | 1 | 2247 | 89 | 805 | 1 | 784 | 90 | 3 | 112 | 10025 | 819 | 82 | 80 | 43 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521017 | 468824 | 0 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10904 | 9 | 1325 | 372 | 0 | 683 | 10268 | 281 | 0 | 927 | 50 | 872 | 10920 | 22 | 1314 | 7 | 1 | 640 | 3 | 16 | 3 | 2 | 10037 | 10000 | 1 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 75 | 1 | 1 | 1 | 0 | 2205 | 90 | 868 | 1 | 784 | 89 | 0 | 116 | 10025 | 827 | 94 | 92 | 47 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521041 | 468824 | 0 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10965 | 7 | 1315 | 347 | 0 | 671 | 10249 | 274 | 0 | 945 | 36 | 765 | 10941 | 17 | 1274 | 7 | 0 | 640 | 3 | 16 | 2 | 3 | 10037 | 10000 | 1 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 75 | 1 | 0 | 0 | 0 | 2148 | 83 | 838 | 1 | 712 | 84 | 0 | 164 | 10025 | 815 | 71 | 60 | 34 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521041 | 468824 | 0 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10921 | 7 | 1298 | 352 | 0 | 707 | 10270 | 271 | 1 | 935 | 46 | 919 | 10958 | 20 | 1067 | 7 | 2 | 640 | 3 | 16 | 2 | 3 | 10037 | 10000 | 2 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 75 | 1 | 0 | 0 | 0 | 2121 | 89 | 825 | 1 | 680 | 71 | 0 | 116 | 10025 | 832 | 99 | 65 | 49 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521049 | 468824 | 0 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10923 | 7 | 1343 | 353 | 0 | 699 | 10260 | 263 | 0 | 888 | 36 | 913 | 10931 | 18 | 1263 | 7 | 0 | 640 | 2 | 16 | 3 | 3 | 10037 | 10000 | 0 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
| 10024 | 10040 | 75 | 1 | 0 | 0 | 0 | 2094 | 91 | 814 | 1 | 744 | 90 | 0 | 124 | 10025 | 796 | 72 | 62 | 48 | 25 | 20010 | 10010 | 10000 | 10010 | 10000 | 521041 | 468824 | 1 | 49 | 6960 | 10040 | 10040 | 8696 | 3 | 8770 | 20010 | 20 | 10000 | 20 | 20000 | 10040 | 124 | 1 | 1 | 10021 | 10 | 9 | 10 | 10000 | 10 | 10000 | 10 | 10932 | 7 | 1337 | 361 | 0 | 671 | 10248 | 287 | 1 | 926 | 36 | 823 | 10937 | 17 | 1105 | 7 | 0 | 640 | 3 | 16 | 3 | 2 | 10037 | 10000 | 3 | 10000 | 10010 | 10041 | 10041 | 10041 | 10041 | 10041 |
Count: 8
Code:
strb w0, [x6, #8]! strb w0, [x7, #8]! strb w0, [x8, #8]! strb w0, [x9, #8]! strb w0, [x10, #8]! strb w0, [x11, #8]! strb w0, [x12, #8]! strb w0, [x13, #8]!
mov x7, x6 mov x8, x6 mov x9, x6 mov x10, x6 mov x11, x6 mov x12, x6 mov x13, x6
(fused SUBS/B.cc loop)
Result (median cycles for code divided by count): 0.5098
| retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | 09 | 18 | 19 | 1e | 1f | 20 | 22 | 29 | 3a | 3e | 3f | 40 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 67 | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int store (96) | inst int alu (97) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d cache miss st (a2) | l1d cache miss ld (a3) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | aa | ab | ac | af | bc | l1d cache miss st nonspec (c0) | c2 | cf | d5 | map dispatch bubble (d6) | dd | fetch restart (de) | e0 | ? int output thing (e9) | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 80209 | 40707 | 305 | 0 | 0 | 0 | 0 | 1824 | 963 | 795 | 1 | 656 | 123 | 112 | 40737 | 760 | 1545 | 1770 | 137 | 25 | 160994 | 80397 | 80004 | 80100 | 80000 | 412853 | 1877440 | 0 | 1832 | 49 | 37744 | 40785 | 40772 | 30728 | 3 | 30692 | 160100 | 200 | 80000 | 200 | 160000 | 40736 | 75 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80872 | 4193 | 474 | 6 | 906 | 80570 | 238 | 0 | 864 | 130 | 1570 | 81341 | 583 | 3982 | 0 | 5110 | 1 | 16 | 1 | 1 | 40766 | 80477 | 80000 | 80100 | 40839 | 40739 | 40819 | 40812 | 40704 |
| 80204 | 40824 | 305 | 0 | 0 | 0 | 0 | 1797 | 747 | 785 | 1 | 688 | 105 | 92 | 40782 | 768 | 1858 | 1603 | 229 | 25 | 160807 | 80496 | 80000 | 80100 | 80000 | 419238 | 1872976 | 1 | 260 | 49 | 37641 | 40804 | 40810 | 30586 | 3 | 30698 | 160100 | 200 | 80000 | 200 | 160000 | 40824 | 75 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80886 | 3761 | 456 | 2 | 855 | 80552 | 269 | 0 | 884 | 22 | 1600 | 81345 | 514 | 4176 | 0 | 5110 | 1 | 17 | 1 | 1 | 40702 | 80634 | 80000 | 80100 | 40837 | 40861 | 40696 | 40870 | 40797 |
| 80204 | 40861 | 306 | 0 | 0 | 0 | 0 | 1608 | 695 | 792 | 1 | 656 | 98 | 104 | 40756 | 782 | 1726 | 1711 | 109 | 25 | 160387 | 80869 | 80015 | 80100 | 80000 | 403211 | 1876192 | 0 | 1702 | 49 | 37651 | 40806 | 40793 | 30675 | 3 | 30708 | 160100 | 200 | 80000 | 200 | 160000 | 40803 | 76 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80857 | 4113 | 491 | 17 | 850 | 80565 | 232 | 0 | 875 | 66 | 1483 | 81435 | 491 | 4027 | 0 | 5110 | 1 | 17 | 1 | 1 | 40705 | 80898 | 80000 | 80100 | 40698 | 40729 | 40787 | 40767 | 40683 |
| 80204 | 40726 | 305 | 0 | 0 | 0 | 0 | 1791 | 880 | 763 | 1 | 672 | 96 | 144 | 40805 | 771 | 1509 | 1633 | 153 | 25 | 167081 | 81429 | 80000 | 80100 | 80000 | 418442 | 1878376 | 0 | 267 | 49 | 37686 | 40843 | 40643 | 30733 | 3 | 30718 | 160100 | 200 | 80000 | 200 | 160000 | 40753 | 75 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80878 | 3908 | 461 | 6 | 848 | 80521 | 245 | 0 | 878 | 32 | 1526 | 81421 | 460 | 4192 | 0 | 5110 | 1 | 16 | 1 | 1 | 40855 | 84349 | 80000 | 80100 | 40791 | 40835 | 40737 | 40792 | 40749 |
| 80204 | 40812 | 305 | 0 | 0 | 0 | 0 | 1668 | 842 | 776 | 1 | 688 | 114 | 136 | 40721 | 767 | 1561 | 1665 | 174 | 25 | 160618 | 85851 | 80014 | 80100 | 80000 | 408937 | 1867300 | 0 | 2172 | 49 | 37754 | 40764 | 40852 | 30706 | 3 | 30787 | 160100 | 200 | 80000 | 200 | 160000 | 40816 | 75 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80892 | 4181 | 438 | 9 | 855 | 80542 | 246 | 0 | 868 | 34 | 1302 | 81404 | 529 | 4642 | 0 | 5110 | 1 | 17 | 1 | 1 | 40709 | 80703 | 80000 | 80100 | 40778 | 40966 | 40730 | 40814 | 40688 |
| 80204 | 40926 | 306 | 0 | 0 | 0 | 0 | 1554 | 815 | 779 | 1 | 728 | 112 | 136 | 40738 | 768 | 1791 | 1917 | 181 | 25 | 164101 | 80630 | 80000 | 80100 | 80000 | 402494 | 1875160 | 0 | 296 | 49 | 37559 | 40749 | 40782 | 30589 | 3 | 30730 | 160100 | 200 | 80000 | 200 | 160000 | 40837 | 75 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80871 | 4590 | 461 | 6 | 890 | 80453 | 219 | 0 | 891 | 98 | 1565 | 81411 | 556 | 4566 | 0 | 5110 | 1 | 17 | 1 | 1 | 40794 | 80551 | 80000 | 80100 | 40797 | 40800 | 40733 | 40778 | 40721 |
| 80204 | 40786 | 305 | 0 | 0 | 0 | 0 | 1431 | 700 | 775 | 1 | 688 | 126 | 104 | 40680 | 755 | 1791 | 1799 | 182 | 25 | 160736 | 83319 | 80000 | 80100 | 80000 | 401626 | 1877152 | 1 | 390 | 49 | 37737 | 40794 | 40755 | 30557 | 3 | 30763 | 160100 | 200 | 80000 | 200 | 160000 | 40708 | 75 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80871 | 3817 | 501 | 3 | 865 | 80496 | 262 | 0 | 859 | 26 | 1421 | 81356 | 517 | 4199 | 0 | 5110 | 1 | 16 | 1 | 1 | 40731 | 81119 | 80000 | 80100 | 40878 | 40880 | 40801 | 40726 | 40796 |
| 80204 | 40795 | 306 | 0 | 0 | 0 | 0 | 2034 | 668 | 790 | 1 | 688 | 108 | 136 | 40862 | 752 | 1695 | 1517 | 171 | 25 | 160327 | 86979 | 80030 | 80100 | 80000 | 402460 | 1874776 | 0 | 531 | 49 | 37568 | 40803 | 40704 | 30738 | 3 | 30773 | 160100 | 200 | 80000 | 200 | 160000 | 40796 | 75 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80855 | 4347 | 452 | 11 | 844 | 80517 | 279 | 0 | 852 | 64 | 1545 | 81424 | 453 | 4224 | 0 | 5110 | 1 | 17 | 1 | 1 | 40833 | 81052 | 80000 | 80100 | 40782 | 40825 | 40627 | 40714 | 40816 |
| 80204 | 40781 | 306 | 0 | 0 | 0 | 0 | 1629 | 801 | 781 | 1 | 696 | 130 | 96 | 40769 | 765 | 1627 | 1918 | 110 | 25 | 168279 | 83182 | 80000 | 80100 | 80000 | 413649 | 1875280 | 1 | 306 | 49 | 37714 | 40766 | 40750 | 30677 | 3 | 30752 | 160100 | 200 | 80000 | 200 | 160000 | 40666 | 76 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80883 | 4282 | 461 | 12 | 839 | 80510 | 259 | 0 | 859 | 126 | 1506 | 81316 | 524 | 4014 | 0 | 5110 | 1 | 16 | 1 | 1 | 40685 | 82728 | 80000 | 80100 | 40706 | 41321 | 40742 | 40735 | 40769 |
| 80204 | 40782 | 305 | 0 | 0 | 0 | 0 | 1890 | 728 | 785 | 1 | 680 | 119 | 156 | 40848 | 765 | 1732 | 1636 | 188 | 25 | 161141 | 82661 | 80000 | 80100 | 80000 | 404861 | 1877344 | 0 | 1893 | 49 | 37663 | 40749 | 40715 | 30543 | 3 | 30750 | 160100 | 200 | 80000 | 200 | 160000 | 40815 | 75 | 1 | 1 | 80201 | 100 | 99 | 100 | 80000 | 100 | 80000 | 100 | 80833 | 4001 | 485 | 8 | 873 | 80524 | 260 | 0 | 841 | 30 | 1524 | 81369 | 469 | 3863 | 0 | 5110 | 1 | 17 | 1 | 1 | 40835 | 80389 | 80000 | 80100 | 40749 | 40738 | 40718 | 40864 | 40836 |
Result (median cycles for code divided by count): 0.5093
| retire uop (01) | cycle (02) | 03 | l1d tlb fill (05) | mmu table walk data (08) | l2 tlb miss data (0b) | 1e | 1f | 20 | 22 | 29 | 3a | 3e | 3f | 40 | 46 | 49 | 4f | 51 | schedule uop (52) | schedule int uop (53) | schedule ldst uop (55) | dispatch int uop (56) | dispatch ldst uop (58) | int uops in schedulers (59) | simd uops in schedulers (5a) | 60 | 67 | 69 | 6a | 6d | 6e | map stall dispatch (70) | map rewind (75) | map stall (76) | dispatch uop (78) | map int uop (7c) | map ldst uop (7d) | map int uop inputs (7f) | map ldst uop inputs (80) | 82 | 83 | flush restart other nonspec (84) | 85 | inst all (8c) | inst branch (8d) | inst branch taken (90) | inst branch cond (94) | inst int store (96) | inst int alu (97) | inst ldst (9b) | 9f | l1d tlb access (a0) | l1d tlb miss (a1) | l1d cache miss st (a2) | l1d cache miss ld (a3) | a4 | ld unit uop (a6) | st unit uop (a7) | l1d cache writeback (a8) | a9 | aa | ab | ac | af | bc | l1d cache miss st nonspec (c0) | l1d tlb miss nonspec (c1) | c2 | cf | d5 | map dispatch bubble (d6) | db | dd | fetch restart (de) | e0 | ? int output thing (e9) | ? ldst retires (ed) | ? int retires (ef) | f5 | f6 | f7 | f8 | fd |
| 80029 | 40447 | 303 | 1 | 0 | 1 | 2094 | 384 | 825 | 1 | 720 | 118 | 116 | 40351 | 830 | 1973 | 1857 | 100 | 25 | 160309 | 80320 | 80000 | 80010 | 80000 | 405162 | 1859780 | 0 | 199 | 49 | 37437 | 40371 | 40522 | 30468 | 3 | 30387 | 160010 | 20 | 80000 | 20 | 160000 | 40529 | 92 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80953 | 14 | 4091 | 503 | 6 | 920 | 80282 | 284 | 0 | 916 | 28 | 1213 | 81198 | 247 | 4666 | 14 | 1 | 5020 | 1 | 16 | 0 | 1 | 1 | 40603 | 80427 | 80000 | 80010 | 40468 | 40375 | 40401 | 40366 | 40562 |
| 80024 | 40513 | 302 | 1 | 0 | 0 | 1929 | 321 | 842 | 1 | 736 | 109 | 140 | 40485 | 820 | 1996 | 1730 | 74 | 25 | 164294 | 80584 | 80100 | 80010 | 80000 | 400805 | 1856804 | 0 | 221 | 49 | 37297 | 40485 | 40381 | 30368 | 3 | 30494 | 160010 | 20 | 80000 | 20 | 160000 | 40401 | 92 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80938 | 15 | 4614 | 490 | 12 | 927 | 80246 | 288 | 2 | 927 | 42 | 1217 | 81192 | 243 | 4626 | 14 | 1 | 5020 | 1 | 18 | 0 | 1 | 1 | 40375 | 80311 | 80000 | 80010 | 40414 | 40442 | 40389 | 40552 | 40404 |
| 80024 | 40441 | 302 | 1 | 0 | 0 | 1914 | 388 | 813 | 1 | 720 | 106 | 100 | 40402 | 824 | 2174 | 2088 | 90 | 25 | 160273 | 84058 | 80000 | 80010 | 80000 | 410389 | 1860016 | 0 | 125 | 49 | 37386 | 40475 | 40388 | 30314 | 3 | 30450 | 160010 | 20 | 80000 | 20 | 160000 | 40408 | 85 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80936 | 16 | 4424 | 489 | 5 | 885 | 80284 | 284 | 0 | 937 | 34 | 1274 | 81135 | 257 | 3681 | 14 | 0 | 5020 | 1 | 17 | 0 | 1 | 1 | 40574 | 85436 | 80000 | 80010 | 40469 | 40424 | 40463 | 40320 | 40367 |
| 80024 | 40461 | 302 | 1 | 1 | 1 | 1938 | 389 | 805 | 1 | 792 | 120 | 96 | 40503 | 794 | 2051 | 1946 | 108 | 25 | 166868 | 80316 | 80053 | 80010 | 80000 | 401228 | 1856469 | 0 | 226 | 49 | 37360 | 40427 | 40483 | 30282 | 3 | 30467 | 160010 | 20 | 80000 | 20 | 160000 | 40470 | 93 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80931 | 14 | 4711 | 494 | 10 | 925 | 80288 | 309 | 0 | 909 | 66 | 1310 | 81160 | 270 | 4996 | 14 | 0 | 5020 | 1 | 18 | 0 | 1 | 1 | 40466 | 81191 | 80000 | 80010 | 40439 | 40481 | 40462 | 40480 | 40462 |
| 80024 | 40425 | 302 | 1 | 0 | 0 | 1959 | 391 | 814 | 1 | 760 | 114 | 96 | 40381 | 797 | 1989 | 1897 | 81 | 25 | 164849 | 80368 | 80000 | 80134 | 80000 | 410401 | 1857524 | 0 | 145 | 49 | 37309 | 40428 | 40463 | 30314 | 3 | 30403 | 160010 | 20 | 80000 | 20 | 160000 | 40419 | 92 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80909 | 14 | 4123 | 530 | 7 | 900 | 80291 | 285 | 0 | 910 | 28 | 1222 | 81179 | 287 | 4605 | 14 | 1 | 5020 | 1 | 16 | 0 | 1 | 1 | 40511 | 80201 | 80000 | 80010 | 40423 | 40461 | 40839 | 40419 | 40551 |
| 80024 | 40448 | 302 | 1 | 1 | 0 | 2079 | 377 | 821 | 1 | 728 | 115 | 124 | 40545 | 784 | 1882 | 2127 | 99 | 25 | 160324 | 80198 | 80000 | 80010 | 80000 | 401691 | 1860612 | 0 | 93 | 49 | 37318 | 40391 | 40423 | 30480 | 3 | 30478 | 160010 | 20 | 80000 | 20 | 160000 | 40410 | 91 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80917 | 14 | 4071 | 520 | 5 | 902 | 80290 | 294 | 0 | 949 | 36 | 1166 | 81171 | 255 | 4443 | 14 | 0 | 5020 | 1 | 18 | 0 | 1 | 1 | 40395 | 84494 | 80000 | 80010 | 40329 | 40412 | 40409 | 40447 | 40356 |
| 80024 | 40432 | 302 | 1 | 1 | 1 | 2004 | 327 | 821 | 1 | 744 | 102 | 144 | 40599 | 785 | 1994 | 2137 | 119 | 25 | 160386 | 80431 | 80043 | 80010 | 80000 | 402257 | 1859624 | 0 | 221 | 49 | 37421 | 40410 | 40394 | 30371 | 3 | 30467 | 160010 | 20 | 80000 | 20 | 160000 | 40550 | 90 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80991 | 14 | 4498 | 489 | 12 | 939 | 80259 | 280 | 0 | 912 | 38 | 1260 | 81185 | 229 | 4497 | 14 | 1 | 5020 | 1 | 17 | 0 | 1 | 1 | 40467 | 80404 | 80000 | 80010 | 40415 | 40431 | 40501 | 40453 | 40466 |
| 80024 | 40439 | 302 | 1 | 0 | 0 | 1986 | 440 | 832 | 1 | 712 | 121 | 116 | 40379 | 822 | 2179 | 2046 | 103 | 25 | 160920 | 80622 | 80053 | 80010 | 80000 | 400743 | 1856324 | 0 | 300 | 49 | 37442 | 40402 | 40397 | 30365 | 3 | 30381 | 160010 | 20 | 80000 | 20 | 160000 | 40443 | 92 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80935 | 15 | 4702 | 487 | 7 | 919 | 80224 | 290 | 0 | 933 | 46 | 1215 | 81201 | 284 | 4291 | 14 | 0 | 5020 | 1 | 17 | 0 | 1 | 1 | 40369 | 80249 | 80000 | 80010 | 40388 | 40476 | 40411 | 40537 | 40433 |
| 80024 | 40458 | 303 | 1 | 1 | 0 | 1986 | 360 | 837 | 1 | 776 | 122 | 112 | 40444 | 785 | 2183 | 2024 | 88 | 25 | 169614 | 84202 | 80000 | 80010 | 80000 | 401216 | 1858396 | 0 | 1259 | 49 | 37358 | 40446 | 40431 | 30364 | 3 | 30455 | 160010 | 20 | 80000 | 20 | 160000 | 40413 | 87 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80915 | 15 | 4139 | 507 | 6 | 877 | 80271 | 323 | 0 | 919 | 28 | 1213 | 81146 | 258 | 4416 | 14 | 0 | 5020 | 1 | 17 | 0 | 1 | 1 | 40690 | 84912 | 80000 | 80010 | 40425 | 40485 | 40380 | 40399 | 40433 |
| 80024 | 40376 | 303 | 1 | 0 | 1 | 2082 | 338 | 820 | 1 | 744 | 116 | 136 | 40420 | 823 | 1951 | 1949 | 107 | 25 | 160508 | 82835 | 80000 | 80134 | 80000 | 406537 | 1858028 | 0 | 481 | 49 | 37346 | 40400 | 40415 | 30299 | 3 | 30364 | 160010 | 20 | 80000 | 20 | 160000 | 40429 | 92 | 1 | 1 | 80021 | 10 | 9 | 10 | 80000 | 10 | 80000 | 10 | 80943 | 14 | 4653 | 485 | 9 | 891 | 80300 | 303 | 3 | 921 | 34 | 1234 | 81130 | 258 | 4471 | 14 | 0 | 5020 | 1 | 16 | 0 | 1 | 1 | 40397 | 86314 | 80000 | 80010 | 40467 | 40865 | 40501 | 40429 | 40435 |