Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

STR (register, S)

Test 1: uops

Code:

  str s0, [x6, x7]
  mov x0, 0
  mov x7, 8

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 1.000

SIMD/FP unit issues: 0.000

retire (01)cycle (02)0305080b1e1f22233a3f46494f51inst issue (52)~issue ld/st (55)~dispatch ld/st (58)huge thing ld/st (5a)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op ld/st (7d)~map lookup ld/st (80)8283pipeline redirect (84)85inst all (8c)inst fp/simd store (99)inst ldst (9b)a0a1a2a4a6a7a8a9acafbcdcache store miss (c0)dtlb miss (c1)c2cfd5d6ddinst fetch restart (de)e0ld/st retires (ed)f5f6f7f8fd
1005560410102110153716166251000100010002322005255575533743410100010003000549558111001100010001015153600101601201002163614073116115461000553552561559558
1004558410001910153816165251000100010002324715345595603713416100010003000559560111001100010001014143602101601161002163614173116115571000559560560560553
1004552411002100154415162251000100010002290805345585513723410100010003000558552111001100010001015153610101600161002163614073116115481000553554553551561
1004561411001910153516165251000100010002322005255595523733410100010003000558552111001100010001014153611101602181002163614073116115491000560560553553553
1004551411002110153816165251000100010002324715345595603713415100010003000559560111001100010001016163600101601201002163614373116115481000559554553551561
1004561410101910153416165251000100010002322005245585533743408100010003000558552111001100010001014143601101600201002163614173116115571000553552550559559
1004558410101910154216163251000100010002290815265585523733417100010003000559549111001100010001015143601101601181002163614173116115561000561560560560560
1004559411001810154316163251000100010002331605275525593653418100010003000558550111001100010001015153601101600171002163614173116115471000553553552561561
1004558410101910153616165251000100010002326815345525593653416100010003000552559111001100010001014153502101601181002163614173116115561000558560560555553
1004552411101910154616162251000100010002326805365595513713417100010003000560559111001100010001015153600101600171002163414173116115491000560560553552551

Test 2: throughput

Count: 8

Code:

  str s0, [x6, x7]
  str s0, [x6, x7]
  str s0, [x6, x7]
  str s0, [x6, x7]
  str s0, [x6, x7]
  str s0, [x6, x7]
  str s0, [x6, x7]
  str s0, [x6, x7]
  mov x7, 8

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.5007

retire (01)cycle (02)030508090b18191e1f22233a3f46494f51inst issue (52)~issue int (53)~issue ld/st (55)~dispatch int (56)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map lookup int (7f)~map lookup ld/st (80)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst fp/simd store (99)inst ldst (9b)9fa0a1a2a4a6a7a8a9acafbcdcache store miss (c0)dtlb miss (c1)c2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)gpr retires (ef)f5f6f7f8fd
80205400523001100006019101400351616725801001008000010080007500184024604002440059400592997773001380107200800162002400484005140053118020110099100100800008000010080014153601800160019800021636140111511821600400550800001004005940053400604005440060
8020440051300100000019101400371616025801001008000010080007500184020004002840058400582997673000980106200800162002400484005240059118020110099100100800008000010080016153600800160220800021636140111511801600400570800001004004940053400594005340060
802044005030011010022528310140037016525801001008000010080007500183971904002840058400602997773000280107200800162002400484005940058118020110099100100800008000010080015153600800140121800021636140111511801600400490800001004005240060400484005940061
802044005830011010010819101400371616025801001008000010080006500184027704002840058400582997873000280106200800162002400484004740059118020110099100100800008000010080014143602800160120800021635140111511801600400560800001004006040051400594005140053
80204400603001101001082110140033160125801001008000010080006500183995804003340050400522997173000480106200800162002400484006040052118020110099100100800008000010080015153610800160118800021436141111511801600400550800001004006140060400614005940058
802044005230011000010520101401171616625801001008000010080006500184024704002240059400612997773000280107200800162002400484005840058118020110099100100800008000010080015153601800160119800021636140111511801600400580800001004006040053400594005340059
802044005130010110050118101400451616425801001008000010080006500184034204002740057400602997973000380106200800162002400484005840060118020110099100100800008000010080015153400800160118800021636140111511801600400550800001004005440060400534006240052
80204400593001011009317101400381616125801001008000010080007500183995804003340050400522997173000180106200800162002400484005840059118020110099100100800008000010080015153600800160214800021636141111511801600400580800001004006040048403574005340059
80204400473001112000211014004416161125801001008000010080006500184029404002740058400582997873001380106200800162002400484005940059118020110099100100800008000010080014153600800160019800021636140111511801600400550800001004004840061400594005140060
802044005930011000047721001400441616925801001008000010080007500183993904002640059400593002873000280107200801442002400484005140052118020110099100100800008000010080014143601800160120800021636141111511801600400470800001004006040052400594005340059

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.5005

retire (01)cycle (02)03041e1f2223243f46494f51inst issue (52)~issue int (53)~issue ld/st (55)~dispatch int (56)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map lookup int (7f)~map lookup ld/st (80)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst fp/simd store (99)inst ldst (9b)9fa0a2a4a7a8acafbcdcache store miss (c0)cfitlb miss (d4)d5d6ddinst fetch restart (de)e0ld/st retires (ed)gpr retires (ef)f5f6f7f8fd
80025400423000807310040028161602580010108000010800005018394480400170400424004229977330022800102080000202400004004040042118002110910108000080000108000042080002028000224250211221617174003980000104004340041400444004340044
80024400423001894010040025161615825800101080000108010850183944814014304032340318299773300358011820800002024000040040400421180021109101080000800001080000008000200800022425020013168174003980000104004340041400434004140043
8002440042299003100400250160258001010800001080000501839448040015040043400432997733002080010208000020240000400404004211800211091010800008000010800004208000002800000050200161615174004080000104004440043400434004440043
80024400423000030004002516160258001010800001080000501839448040017040042400422997533002680010208000020240000400404004311800211091010800008000010800000080000028000224250200171617174003780000104004440041400434004140043
80024400433000631004002516002580010108000010800005018393520400180400434004329977330026800102080000202400004004240042118002210910108000080000108000042080002008000224250200151614164003780000104004340043400434005540043
800244004230000010040027161602580010108000010800005018394721400170400424004229977330024800102080000202400004004240042118002110910108000080000108000042080002028000224250200171617174027680000104004340043400414004140043
800244004230000310040028161602580010108000010800005018394480400170400404004029975330022800102080000202400004004240042118002110910108000080000108000042080002028000024250200141617144003780000104004340041400434004340043
800244004229900300040027161602580010108000010800005018394480400180400434004329975330022800102080000202400004004240040118002110910108000080000108000000800026228000224250211171617174003780000104004440044400434004140044
8002440042299154930104002701612580010108000010800005018394720400180400424004229978330023800102080000202400004004240043118002110910108000080000108000042180002028000224250211171617174003980000104004440044400414004340044
8002440042300103010400271601258001010800001080000501839448040017040042400422997533002380010208000020240000400434004011800211091010800008000010800000080002028000224250211171617164004080000104004440041400434004440043