Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

STXRH

Test 1: uops

Code:

  stxrh w0, w1, [x6]
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 70 nops): 1.000

Issues: 2.947

Integer unit issues: 0.000

Load/store unit issues: 2.949

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)03l1i tlb fill (04)mmu table walk instruction (07)mmu table walk data (08)l2 tlb miss instruction (0a)0f1e1f223a3f51schedule uop (52)schedule ldst uop (55)dispatch ldst uop (58)simd uops in schedulers (5a)5f606164696a6d6emap rewind (75)map stall (76)dispatch uop (78)map ldst uop (7d)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst int store (96)inst ldst (9b)l1d tlb access (a0)l1d cache miss st (a2)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)acafatomic or exclusive fail (b4)l1d cache miss st nonspec (c0)cfd0d2l1i cache miss demand (d3)l1i tlb miss demand (d4)d5map dispatch bubble (d6)d9dadbddfetch restart (de)e0eaebec? ldst retires (ed)f5f6f7f8fd
710054544634034704800012186454223067229452933294014665821910004942358454354544047701079629372937585245450454511001171001100010002926292202924032916100010002198359145077210551364739226544538871181154530420743205251877910004544245449454364546845451
71004454603412410450880012142454373075029172928292614590021910004942364454474544747801074729112906580845435454381001171001100010002901288802897002901100010002198657865024210351164998226444448781161154533520708205501876710004546545464454554545545450
71004454613402390460840012174454243075929392929294114620721910004942361454494544347681076029162907579245436454441001171001100010002899292002921002919100010002199657865027209141154778226844508931091174532320743205781881110004544745444454804544045437
71004454403401480500668002177454233088829092931292514565422010004942351454414544147431074629252919584045437454551001171001100010002936293702939002938100010002203657745052207261174702227944408951171164533720744206081877710004545545449454494545145449
710044545234024104100012176454343078929502947294314730421910004942373454534544947891080429512943590445447454451001171001100010002941294502944002929100010002204957575045209231144500227644478861211154535220708205641876010004546045452454454545445458
71004454553402440460779012132454363064629422954294914790221910004942374454504545747931077629392950589445445454521001171001100010002948294002941002935100010002203457855030208161164563225844418871131044534320777205931879110004545045436454414545145455
71004454473402440450799012150454373071229592958295014765021910004942376454614545547951080129542945585845452454461001171001100010002932293202933092925100010002197258405058210761174917227144398881141144531320774206121876410004544845449454464544445451
71004454473411440420694002191454383068929492941294314735021910004942361454464543547861078929502937590445443454451001171001100010002930292502932202929100010002201958495045210941154564226744458871131174533720743205951876910004545945448454494545245455
71004454493402450450803012119454363072429462938294914695121910004942364454464545547961079829492948592045443454511001171001100010002931294802943002946100010002203357995053210141204815228244398841131104533120741206021877010004546045453454554545145492
71004454523402470480591012159454293070229352948294314740421910004942369454484545147551073829552956588445457454571001171001100010002946294802932002932100010002202957575043211341144771228444408831161124533120737205811876510004545245452454404544845452

Test 2: throughput

Code:

  stxrh w0, w1, [x6]
  add x6, x6, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 38.9134

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)09l2 tlb miss data (0b)191e1f20222324293a3e3f404f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)60616467696a6b6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int store (96)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafatomic or exclusive fail (b4)bcl1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cdcfd0d5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)? ldst retires (ed)? int retires (ef)f5f6f7f8fd
202063893552916100102068301122000980389243423692795585162989322595847887826974941274508711718065101000004938611503891343892588353359079181303148702979447877861479450415575183891272092851000512020110099100100001010010000010022964813432309110229648007002000422964810000712321402094531551097853593890752914481000010100389261389261389135389258389248
2020438913529151100020088010820005603891137069402558500298924259576788773697486127446671171766210100000493860480389252389250835315907918117114862837944737786687944971557208389250389250100011202021009910010000101001000001002297910350581401222296486101271322000422977410000015680002094521551097053593891942914231000010100389128389254389253389129389128
20204389127291500000206320762000920389112450694015585002989242595767887976974861274460511717702001000004938617003891273891698352859210181293148628379447477878679447315572083891273891271000112020110099100100001010010000010022964814094600022964820001999822964810000022720002094681551097853593891902914231000010100389250389253389128389128389128
20204389127291510000199980741001650038923525069280558500298924259576788770697486127446411171766200100000493860480389252389252835425920418117314863737947317786687945371557450389250389250100011202011009910010000101001000001002297351240239086229648028474200042296801000008641202094531551097653593892002914311000010100389136389136389261389261389136
20204389258291621010200010140000940389113440694025585142989382595767887736974861274469011718961001000014493860550389260389135834705907918129714862997945077786737945041557350389135441000112020110099100100001010010000010022967792918050022966310002000522965610000011520002094531551097653593890742914311000010100389137389261389136389136389263
2020438912829162202020039711410005416389121406940455850029892425958178877469748712744601117169210010000049386047038925238928083529590831811781486282794499778604794496155720038912738925210001120201100991001000010100100000100229754426973110104229649511111042000122975710000013440002094521541097853593891922914231000010100389128389291389131389128389129
202043891272915000002001770000084038912000693095585522989242595767887986974861274464111716922001000004938617203891273892758346859206181172148628379447077866579447115573303891273891271000112020110099100100001010010000010022964804756500022964800001999822964810000712801202094531551097953593891922914231000010100389253389251389129389129389128
202043891272916000001999801142000740389235380694015585002989242595767887716974871274466411717689101000004938604703892523891288352859203181173148628379447177860479449715572003892523891271000112020110099100100001010010000010022981273212300022966301002000522965610000714401102094531551097053593891922914231000010100389250389251389251389129389128
2020438912729150000019998083200089038911239069279558514298924259576788774697486127446901171766200100000493861720389136389271834705920318117914862987944827787467944971557208389252389128100011202011009910010000101001000001002297150313866002296480068602000122971610000013760002094521551097853593891902914251000010100389251389251389128389250389149
2020438912729150001019998770000096038923760692805585002989242595767887976974861274457811717702001000004938617003892503891288347459212181291148627379447377860479450015573363892503892501000112020110099100100001010010000010022975002991110010422964800103862000422974910000012160002094511551097553593890672914231000010100389251389129389253389251389251

1000 unrolls and 10 iterations

Result (median cycles for code): 38.9947

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)l2 tlb miss data (0b)181e1f202223293a3e3f404f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)606467696a6b6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int store (96)inst int alu (97)inst ldst (9b)9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafatomic or exclusive fail (b4)bcl1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cdcfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)? ldst retires (ed)? int retires (ef)f5f6f7f8fd
20027389952292111101999871200052038993543470088550216290552259664760252697574126897971176517511000004938685603899363899487080959898188845145780876081475916476081415183283899493899361000112002110910100001001010000102298090247713034229746001200199982297281000001536000200996471097253543898872897951000010010389937389948389937389938389937
20024389947292100001999800000003899212807008955020029054425966176024469756612689356117646850100000493868690389947389993708175990318886714578057608107591607608181518334389948389948100021200211091010000100101000010229762434335101222973200160199982297281000001824000200996481097746543898872897931000010010389948389937389937389937389950
200243899372921000020120000000443899213807009955021429054425965676024269756612689356117647380100000493868773389936389953708145990018885714578047609567591717608221518360389955441000112002110910100001001010000102297458402300022297430200200052297361000071056000200996541097046483898762898121000010010389950389937389948389949389948
2002438993629210000199980000000389932100700995502002905442596567602386975661268937311764761110000049386867038994038994970850599091888571457808760815759167760812151832238993638993610001120021109101000010010100001022983216328630002297280000199982298261000001216000200996551097752553898762897931000010010389937389990389957389951389949
20024389948292100001999800000003899295537010155020029054425965676024669756612689390117647730100000493868670389936389947708165988918884514578057608127592557608121518344389936389938100011200211091010000100101000010229767028449408822972810304199982297301000001120000200996541097052543898762897931000010010389949389937389939389938389948
2002438993629210000199980440003803899334707010155020029054425965676024169756612689373117647470100000493868560389948389947708105988918885814578057608107591637608101518334389947389936100011200211091010000100101000010229774040223104222972867094020007229756100000800000200996481097253543898762897931000010010389937389937389948389937389948
200243899472921000019998000000038992326070088550200290544259656760242697566126893991176468501000004938686703899373899477081659899188851145780576081275916776081015183383899493899371000112002110910100001001010000102297280247695002297280042199982297281000001440000200997591097646493898782897931000010010389948389937389949389948389937
20024389936292100042075278920000389933123700885502162905522596647602486975741268978911765135110000049386875038995538995670817599061888631457824760814759166760811151833838994738993610001120021109101000010010100001022972803139209692297500000199982297281000001216000200996541097052543898762897931000010010389937389939389950389938389937
200243899362921000019998000000038993433070100550200290558259685760246697566126893891176479611000004938387903899373899487081159888188857145780776081575916176081215183323899473899481000112002110910100001001010000102297280328630002297320000199982297281000001024000200997541097253543898882897931000010010389949389949389950389949389949
20024389936292100002000404020042243899210070090550200290544259656760244697566126893881176477311000004938686803899363899477081659909188846145780476081475916476081215183183899373899361000112002110910100001001010000102297280306540002297281000199982297281000001568000200996481097646493898762897931000010010389949389937389937389937389949

Test 3: throughput

Code:

  stxrh w0, w1, [x6]
  mov x7, 8

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 38.0107

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)l2 tlb miss data (0b)18191e1f2223243a3f4f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6064696a6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int store (96)inst int alu (97)inst ldst (9b)9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafatomic or exclusive fail (b4)bcl1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2c9cdcfd0d5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)? ldst retires (ed)? int retires (ef)f5f6f7f8fd
102053801012847000001999814100038010007027152927110697518575106979157775438410462252110000493770353801153801151304445996324899592643319100938443191021876886380115380115100011102021009910010000100100001004589261445886800458882022002045886710000141000011010172638013111072130130380061119710000100380108380108380111380111380108
10204380107284700000199980000181380092070271529272106975185751069791573654384104618630100004937397338010738010713043759951248985926433191009384431910218771583801073801071000111020110099100100001001000010045886604588660045886600199984588661000001000000010172638113011072130130380040119710000100380118380108380108380108380108
10204380107284700000199980000181380093070271529272106975185751069791573654384104618680100004937702738010738010713043759957248992926433191009384431910218776423801073801071000111020110099100100001001000010045886604588660045886600199984588661000001000000010172638113011059130130380061119710000100380108380110380108380108380108
10204380107284700000199980000181380092070271529272106975185751069791573654384104618680100004937702838010738010713043759947248979926679191009384511910018768863801073801071000111020110099100100001001000010045886604588660045891220199984588661000001000000010172636112911072130130380040119710000100380108380109380108380108380108
102043801072847000002061501001813800940702715292721069751857510697915736543841046186301000049377029380107380124130437599472489799264331910093844319102187688638010738010710001110201100991001000010010000100458866045886600458868670199984588661000001000000010172635113011072130130380040119710000100380108380108380110380108380108
10204380107284700000199980100181380092070271529272106975185751069791573654384104618630100009837702938010738010713043759953248979926433191009384431910018768863801073803131000111020110099100100001001000010045886604588660045886600199984588661000001000000010172636113011072129129380042119710000100380108380108380108380108380108
10204380107284700000200860000181380092070272529272106975185751069791573654384104618680100004937702738011038010713043759948248980926433191009384431910018769823801073801071000111020110099100100001001000010045886604588660045886600199984588661000001000000010172641112911064131130380040119710000100380108380109380108380108380108
10204380107284700000199980000181380092070271529272106975185751069791575554384104745330100004937702738010738010713043759960248995926433191009384431910018768863801073801071000111020110099100100001001000010045886604588660045886600200044588661000001000000010172638112911072130130380040119710000100380108380108380110380108380108
10204380107284700000199980000181380092070271532538106975185751069791573654384104618631100004937702738011338010713043759960248979926433191009384431910018768863801073801071000111020110099100100001001000010045886604588660045886600199984588661000001000000010172638113011069130130380040119710000100380108380125380173380109380108
10204380107284700000199980000180380092070271529272106975185751069791573654384104618631100004937702838010738010713043759947248995926433191009384431910018771003801073801071000111020110099100100001001000010045887204589160045886660199984588661000001000000010172636113011066129129380043119710000100380108380108380108380108380110

1000 unrolls and 10 iterations

Result (median cycles for code): 38.0011

retire uop (01)cycle (02)03mmu table walk instruction (07)mmu table walk data (08)l2 tlb miss instruction (0a)l2 tlb miss data (0b)1e22233f4f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6064696a6b6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int store (96)inst int alu (97)inst ldst (9b)9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)a4st unit uop (a7)l1d cache writeback (a8)a9acafatomic or exclusive fail (b4)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)cdcfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)? ldst retires (ed)? int retires (ef)f5f6f7f8fd
100253800112847000019998003799960702695197321067518665106791580554241047039401000049376931038001138001113834859945249358916872191095389219101907784380059380011100011100211091010000101000010458956045895604589560019998458956100001000000169646451108041413799441171000010380012380012380012380013380012
100243800122846000019998103799960702675197321067518725106791580454241047039901000049376931038001138001113834859940249333916872191095389219101907784380011380011100011100211091010000101000010458956045895504589560019998458956100001000002169646401107941413799441171000010380012380012380012380012380012
100243800112847000020022003799960702675197321067518665106791580554241047039401000049376931038001338001113834859939249329916872191095389219101907784380016380011100011100211091010000101000010458956045895604589560019998458956100001000000169646411107741413799441171000010380012380012380014380012380012
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