Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

SWP (64-bit)

Test 1: uops

Code:

  swp x0, x1, [x6]
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 70 nops): 2.000

Issues: 2.000

Integer unit issues: 0.000

Load/store unit issues: 2.000

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk instruction (07)mmu table walk data (08)09l2 tlb miss instruction (0a)l2 tlb miss data (0b)0e0f1e1f2223243a3f464951schedule uop (52)schedule ldst uop (55)dispatch ldst uop (58)simd uops in schedulers (5a)5f696a6d6emap rewind (75)map stall (76)dispatch uop (78)map ldst uop (7d)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst int load (95)inst ldst (9b)9dl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cfd0d1d2l1i cache miss demand (d3)l1i tlb miss demand (d4)d5map dispatch bubble (d6)d9dadbddfetch restart (de)e0eaebec? ldst retires (ed)f5f6f7f8fd
72005331312480280124011100201006009329721127912200020002000100001049300103275733219310200020003000329575190117100110001000020000221000100000220011120211613511764083403858128323055386744371454653253517614145581711820003290132842329233288332946
72004332662471260028100100011006007328310027775200020002000100001249299133279732810310200020003000330845203117100110001000120033221001100100420012102231597311716082553846137123116387744371870653247516548147421663520003296232944329163303133418
720043310824913410250001004110058643282800277902000200020001000084929658328973284331020002000300032869520311710011000100002000020100110000022001102200155941160018242386795823037380744351667623243916927147041612820003297732902328133292632809
720043287824602700240001003000057293314500279192000200020001000084930201329363329731020002000300032865520211710011000100002000022100110000022001102200159091180508237389196223372379144441959643239616381146331627820003296432942329603321532969
720043304124902500250011002000059843275810278302000200020001000064930134328003321531020002000300033139522511710011000100002000022100010001022001102200159281176908209391456823083377444351558603254016728146561595520003298532893329823304832951
720043300424802600270001004010059213304600278242000200020001000054929937327773291131020002000300032817520711710011000100002000022100110000052000002200161801114118163394356823050387144422058583255117116148511645920003294133006330863285833244
7200432960247023002700010070100593032823002767520002000200010000449299953296332883310200020003000330385201117100110001000020000201000100000220011022001598211505083073771146823283392044352266673264317128147791638820003304133000331193306433127
7200433134248032002800010130100596232861002804020002000200010000749298193294133093310200020003000330315217117100110001000020000201000100000020011002001588711538183463873147223129387744351767713247117474150651568120003294133113330103298132910
720043301724702700270001003010059453286400279432000200020001000074930060327273302431220002000300032797521811710011000100002002000100010000022001100200161051168508151386195123142392444361570683251217544149581624620003307933149330773300333140
7200433238247023002600010030000593633025112796120002000200010000849297973287133161310200020003000330575217117100110001000120000221000100000220011022001597511956082073877126223194384744352063623254817284151071655820003309532852330093296633103

Test 2: throughput

Code:

  swp x0, x1, [x6]
  add x6, x6, 8

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0062

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)09l2 tlb miss data (0b)0e0f1e1f2022293a3e3f404346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696a6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafb6bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cfd5map dispatch bubble (d6)ddfetch restart (de)e0? int output thing (e9)eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
302093007122520201056623865176810216830047786301691971356825301051010420000101002000060569141107912492698230062300622603532627030100102002000010200300003006274112020110099010010000101001000001002092461250107710953103092891955361363212841328877761084601310116113006810000131320000101003007230072300723007230072
3020430071225330010590710886177610616030047809302242681360725301021018820000101002000060581141103810492698230062300622602332627930100102002000010200300003007179112020110099010010000101001000001002091319131510541091910325305089038122521307163151373711232031310116113005910000101020000101003006330063300633006330063
3020430062225200000608711853169610512430056814332132171356225301001010220000101002000060496141158115492699130068300712603132627030100102002000010200300003006276112020110099010010000101001000001002091120133310831096410339273093836121221242172931474910041701310116113005910003101020000101003006330063300633006330063
302043006222610000059940905176811515630056807231881801361225301001010220000101002000060522141158910492699130068300712603332627030100102002000010200300003006275112020110099010010000101001000001002094661242106510980103392951919322961212432034567051156601310116113006810007131320000101003007230072300723007230072
302043007122530000160448814180010215230047790182162441351425301071010120000101002000060563141101711492698230062300622602232627930100102002000010200300003007178112020110099010010000101001000001002090120119310341091910302288094656123421287223531368611281931310116113005910003101020000101003006330063300633006330063
3020430062225200000594915819175210716430056812252021971364525301081010120000101002000060500141156211492699130071300712603332627030100102002000010200300003006275112020110099010010000101001000001002095281145108910952103412921905381215213311829566281048021310116113005910006101020000101003006330063300633006330063
3020430062225202000601614848173610315230056802162312051358525301041010220000101002000060513141154210492699130071300712603232627030100102002000010200300003006275112020110099010010000101001000001002087861317110110936103322821895961315212832228767171200601310116113005910002101020000101003006330063300633006330063
302043006222522000058299812173610516030047807202232581360925301051010720000101002000060583141115012492698230062300622602332627030100102002000010200300003006275112020110099010010000101001000021002094881328104310989103492821907401334212461934278311216621310116113005910003101020000101003006330063300633006330063
30204300622252000015851128041704959630047808182071931358425301021010520000101002000060605141120010492698230062300622602232627930100102002000010200300003007178112020110099010010000101001000001002095920127610151098410346332092644131321292163491069711081931310116113005910003101020000101003006330063300633006330063
302043006222522020059267827172011311630047792202241921359925301021010420000101002000060621141108612492698230062300622602632627930100102002000010200300003007178112020110099010010000101001000001002089620121210351096410322279490632113521264143521368410802001310116113005910004101020000101003006330063300633006330063

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0067

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)l2 tlb miss instruction (0a)l2 tlb miss data (0b)0e0f18191e1f2022293a3e3f404346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)6067696a6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9aaabacafb6bbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2cfd5map dispatch bubble (d6)dbddfetch restart (de)e0? int output thing (e9)eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
30029300672253300000057931884816729315630052782362112221358625300131001620000100102000060100141137113492698730067300672604932629730010100202000010020300003006777112002110910100001001010000010209321611889070109251032828339003412532122915319116401094170127031601130064100029920000100103006830068300683006830068
30024300672252202000058041280216801111603005283847204240135702530012100142000010010200006012014113551149269873006730067260603262973001010020200001002030249300777711200211091010000100101000001020945171226949010963103412715913321143212712437910720990140127021601130064100069920000100103006830068300683006830068
30024300672252002000060991078417041072803005278043192206135982530012100142000010010200006013714113661149269873006730067260503262973001010020200001002030000300677711200211091010000100101000011020911171167979010897103422656868341241212341933311674976176127011601130064100039920000100103006830068300683006830068
30024300672262202000059591280917201081123005278742207242136102530011100102000010010200006012514113781149269873006730067260503262973001010020200001002030000300677811200211091010000100101000001020882161193974010910103262802902381253212571430610780992160127011601130064100029920000100103006830068300683006830068
30024300672252002000058731280616961151483005276732199226135522530012100122000010010200006011814113100249269873006730067260523262973001010020200001002030000300677711200211091010000100101000011020912211319990010892103532932894341198212482035711595965162127011611130064100009920000100103006830068300683006830068
300243006722522000000578413780167210014030052792442242351362225300101001220000100102000060141141133512492698730067300672605132629830010100202000010020300003006777112002110910100001001010000010209291612351018010883103102473931361299212441931810637912170127011601130064100009920000100103006830068300683006830068
300243006722520000000577012807169611315230052759362132031359025300151001420000100102000060146141128911492698730067300672605332631130010100202000010103300003006776112002110910100001001010000010209511713251037010937103532847851321144212621542312703963170127011601130064100059920000100103006830068300683006830068
3002430067226200000006155128051688951403005276535208244135842530012100102000010090200006011314113941049269873006430067260513262973001010020200001002030000300677711200211091010000100101000001020922161249993010980103312890908361229212041841010714952170127021601230064100009920000100103006830068300683006830068
300243006722522000000589713814169610910830052773301772171353325300161001320000100102000060144141139001492698730067300672605032629730010100202000010020300003006776112002110910100001001010000110209441613449870109301034928108753811492119215350106221056160127021501130064100009920000100103006830068300683006830068
300243006722520001000590611802164892156300528113219023413543253001010010200001001020000601301411373024926987300673006726050326298300101002020000100203000030067761120021109101000010010100000102091616117510950108831032127259223212612124719351107401000172127021501130064100029920000100103006830068300683006830068

Test 3: throughput

Code:

  swp x0, x1, [x6]
  mov x7, 8

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0200

retire uop (01)cycle (02)03l1d tlb fill (05)mmu table walk data (08)09l2 tlb miss data (0b)0e0f18191e1f22233a3f4346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)60696a6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)l1d tlb miss nonspec (c1)c2branch cond mispred nonspec (c5)branch mispred nonspec (cb)cdcfd1d5map dispatch bubble (d6)ddfetch restart (de)e0e7eaebec? ldst retires (ed)? int retires (ef)f5f6f7f8fd
202063032222600000000339621027303292171613775252010010020000100200005001421209049272763007230328275316277852010020020008200300123033056051102011009912710010000100100001100200262842530100731001401108200645214320266111717380160030329010100200001003032330317302073009730326
202043034322700001000341916001430275017171371825201001002000010020000500141668304926979300593021027534727807201002002000820030012301225601110201100991241001000010010000010020000000321004610002005120048462404600111716560160030128113130200001003018130278300603019230060
2020430121225111100003383200273003721515138482520100100200001002000050014236100492726330176303432756362780020100200200082003001230152558111020110099010010000100100000100200000001841000710002005620011460344600111716330160030088013130200001003018130060303013006030211
20204301802251011000034251600030195417171371025201001002000010020000500141662514927091303163005927270627506201002002000820430012303464411110201100990100100001001000001002000004646010050100020057200481224046001117160016003004900140200001003005330053301873007730307
202043034322700000000340016101330044017171371025201001002000010020000500141660104927130302003029827507727512201002002000820030012301804871110201100990100100001001000001002002627420192100471001401108200433614310261111716380160030149114100200001003019330083303333032930093
20204303562260000000034302001230330013141353525201001002000010020000500141935214926972303403029827421627512201002002000820030012302794061110201100990100100001001000001002002625053010057100160097200277416304125011171630016003033301400200001003005330053300533013730332
202043035522700000000346516101230215317171369325201001002000010020000500141750114927071303093005927398727513201002002000820030012303094291110201100994510010000100100000100200272641537210054100160199200655614294226111171639134003034001400200001003013730355303573005330053
2020430306225000000003428210243031301315138342520100100200001002000050014242211492720630052303342741722276542010020020008200300123005928711102011009901001000010010000010020026264253141007210016011082006573163240260111716390160030343410100200001003035730293300533005330303
2020430250227000000003382210243033901313138312520100100200001002000050014247901492721630340303332753662750620100200200082003001230052527111020110099010010000100100000100200000038010048100022092004850235380011171638016003004900100200001003005330053303473031730053
2020430246227000111003423161014300440181813700252010010020000100200005001410741149271203005930198274316275132010020020008200300123020029011102011009901001000010010000110020027264254010077100160010520063741433412611117163801600302830070200001003034730053301773033230297

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0209

retire uop (01)cycle (02)03mmu table walk data (08)09l2 tlb miss data (0b)0e0f18191e1f22233a3f4346494f51schedule uop (52)schedule int uop (53)schedule ldst uop (55)dispatch int uop (56)dispatch ldst uop (58)int uops in schedulers (59)simd uops in schedulers (5a)60696a6d6emap stall dispatch (70)map rewind (75)map stall (76)dispatch uop (78)map int uop (7c)map ldst uop (7d)map int uop inputs (7f)map ldst uop inputs (80)8283flush restart other nonspec (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst branch cond (94)inst int load (95)inst int alu (97)inst ldst (9b)9d9fl1d tlb access (a0)l1d tlb miss (a1)l1d cache miss st (a2)l1d cache miss ld (a3)a4ld unit uop (a6)st unit uop (a7)l1d cache writeback (a8)a9acafbbbcl1d cache miss ld nonspec (bf)l1d cache miss st nonspec (c0)c2branch cond mispred nonspec (c5)cfd1d5map dispatch bubble (d6)ddfetch restart (de)e0e7eaeb? ldst retires (ed)? int retires (ef)f5f6f7f8fd
200263012822701000003372210230223215141372225200101020000102000050141963014927202300493017827481327532200102020000203000030078479111002110984101000010100000102000003000100341000200392003311226300064018216223009516620000103024930249302463014930249
2002430088227000000033752101930233115151375825200101020000102000050141907304927156302483009127481327728200102020000203000030052475111002110959101000010100000102000003029115100331000000372003331225300064023216223010526620000103024630249302483005330249
200243009822700001003342310133003721501373525200101020000102000050141954804927168302483010027285327728200102020000203000030248479111002110987101000010100000102000000298310034100020041200353320300064018216233021526620000103024930249302493024930247
20024302082270000000338321019301532150135922520010102000010200005014109930492716830248302482741432763820010202000020300003005241711100211098710100001010000110200000302814610031100020041200367226300064018216223024416020000103024930249302393014930259
20024300882270000000337221019302310151413701252001010200001020000501419607049270183024430208272873277282001020200002030000302454591110021109010100001010000010200000300146100311000210362003634226300064018216223006510620000103024930249300533024930247
200243019822700000003377210193023321514137222520010102000010200005014195991492716830149302472748132770820010202000020300003024547911100211092510100001010000010200000302967100331000200362003331226300064018216223020316620000103024930249302493024930053
2002430197227000000033712101930063014151372625200101020000102000050141950004927138302483025027350327578200102020000203000030248359111002110980101000010100000102000003029010012100020092003331225300064023216223024426620000103024930209301293024930219
2002430248227000000033712000300532150137222520010102000010200005014195760492715730248302492736032753220010202000020300003024836911100211098710100001010000010200000302914610037100020041200357026300064018216223024516620000103024930249301793007930249
20024300522260000000338020019302332141413726252001010200001020000501419676149271683008830245274303275322001020200002030000302484191110021109841010000101000001020000030292100341000200362003634225300064023216223009526620000103005330249302503014930249
200243008822500000003381210930233115151358125200101020000102000050141091104927168300953025227442327679200102020000203000030248450111002110901010000101000001020000030280100311000200412003533226300064018216223024516620000103007930249302463024930248