Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

SXTL2 (4S)

Test 1: uops

Code:

  sxtl2 v0.4s, v0.8h
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a6a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10042037150103168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
100420371520761168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037151861168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715961168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
100420371513861168625100010001000264521020182037203715713189510001000100020372037111001100020073116111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715061168625100010001000264521120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037165461168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038

Test 2: Latency 1->2

Code:

  sxtl2 v0.4s, v0.8h
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03080b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020420037150000000061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000001320007101161119791100001002003820038200382003820038
1020420037150000000065019686251010010010000100100005002847521020018200372003718421318745101002001000020010000200372003711102011009910010010000100000000840007101161119791100001002003820038200382003820038
10204200371500000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000000007101161119791100001002003820038200382003820038
102042003715000000001281968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000000007101161119791100001002003820038200382003820038
102042003715000000006119686251010010010000100100005002847521020018200372003718421318745101002001000020010000200372003711102011009910010010000100000000720007101161119791100001002003820038200382003820038
10204200371500000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000000007101161119791100001002003820038200382003820038
1020420037150000000061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000001140007101161119791100001002003820038200382003820038
10204200371500000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000030007101161119791100001002003820038200382003820038
10204200371500000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000000007101161119791100001002003820038200382003820038
10204200371500000000611968625101001001000010010000500284752112001820037200371842131874510100200100002001000020037200371110201100991001001000010000000000007101161119791100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)030b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a6a8a9accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371500000006119686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820038200382003820038
100242003715000000053619686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820038200382003820038
100242003715000042006119686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820038200382003820038
10024200371500003006119686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820038200382003820038
1002420037150000180096419686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820038200382003820038
1002420037150000013206119686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010220020156403162219786310000102013420179201802022920181
10024200841510100016119686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820038200382003820038
10024200371500009006119686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820038200382003820038
10024200371500000006119686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820061200382003820038
10024200371500000006119686251001010100001010000502847521020018020037200371844331876710010201000020100002003720037111002110910101000010000006402162219786010000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  sxtl2 v0.4s, v8.8h
  sxtl2 v1.4s, v8.8h
  sxtl2 v2.4s, v8.8h
  sxtl2 v3.4s, v8.8h
  sxtl2 v4.4s, v8.8h
  sxtl2 v5.4s, v8.8h
  sxtl2 v6.4s, v8.8h
  sxtl2 v7.4s, v8.8h
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03070818191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd5d6e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8020420060150000000292580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000000000111511801620035800001002003920039200392003920039
8020420038150000000712580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000000000111511801620035800001002003920039200392003920039
8020420038150000000292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000002000111511801620035800001002003920039200392003920039
8020420038150010000712580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000000000111511801620035800001002003920039200392003920039
80204200381500000002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000000690111511801620035800001002003920039200392003920039
8020420038150000000292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000000000111511801620035800001002003920039200392003920039
8020420038150000000712580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000000000111511841620035800001002003920039200392003920039
8020420038150000000292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000003000111511801620035800001002003920039200392003920039
8020420038150000000292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000000000111511801620035800001002003920039200392003920039
8020420038150000000292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000000000111511801620035800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8a9acc2cdcfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)eb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80024200501500000003925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001000000005020031655200350080000102003920039200392003920039
80024200381500000003925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001000526005020041653200350080000102003920039200392003920039
80024200381500000003925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001000000005020051653200350080000102003920039200392003920039
800242003815000000041925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001000200005020031644200350080000102003920039200392003920039
8002420038150000000392580010108000010800005064000012001920038200389996310018800102080000208000020038200981180021109101080000100000153005020051635200350080000102003920039200392003920039
80024200381500000003925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001000000005020041634200350080000102003920039200392003920039
80024200381500000003925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001000000005020041634200350080000102003920039200392003920039
8002420038150000000392580010108000010800005064000012001920038200389996310018800102080000208000020038200381180021109101080000100000111005020041643200350080000102003920039200392003920039
80024200381500000003925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001020000005020031643200350080000102003920039200392003920039
800242003815000000039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010000072005020041643200350080000102003920039200392003920039