Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UCVTF (scalar, integer, H from X)

Test 1: uops

Code:

  ucvtf h0, x0
  mov x0, 1
  mov x1, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 2.000

Issues: 2.000

Integer unit issues: 0.000

Load/store unit issues: 1.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)033f4f51inst issue (52)~issue fp/simd (54)~issue ld/st (55)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing ld/st (5a)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op ld/st (7d)~map op fp/simd (7e)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a6accfd5d6ddinst fetch restart (de)e0ld/st retires (ed)? fp/simd (ee)f5f6f7f8fd
2004376336102520001000100010001000140752282035737637672310920001000100010001000376376111001100010000731161137310001000377377377377377
2004376336102520001000100010001000140752282035737637672310920001000100010001000376376111001100010000731161137310001000377377377377377
2004376336102520001000100010001000140752282035737637672310920001000100010001000376379111001100010000731161137310001000377377377377377
2004376336102520001000100010001000140752282035737637672310920001000100010001000376376111001100010000731161137310001000377377377377377
2004376336102520001000100010001000140752282035737637672310920001000100010001000376376111001100010000731161137310001000377394377384377
2004376336102520001000100010001000140752282035737637672310920001000100010001000376376111001100010000731161137310001000377377377377377
2004376336102520001000100010001000140752282035737637672310920001000100010001000376376111001100010000731161137310001000377377377377377
2004376336102520001000100010001000140752282035737637672310920001000100010001000376376111001100010000731161137310001000377377377377377
2004376336102520001000100010001000140752282035737637672310920001000100010001000390378111001100010000731161137310001000377377377377377
2004376336102520001000100010001000140752282035737637672310920001000100010001000376376111001100010000731161137310001000377377377377377

Test 2: Latency 1->2 roundtrip

Code:

  ucvtf h0, x0
  fmov x0, d0
  mov x0, 1
  mov x1, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 13.0032

retire (01)cycle (02)030407081e3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8accdcfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
30204130032974000531130017119408254010010100200001000012520000100005006214497148027091130013013003213003212546631262403010020010000200002001000020000130032130032112020110099100101001000010010000000131012172212951810000100001000010100130033130033130033130033130033
302041300329740000130017119408254012510125200001000010020000100005006214497148027090130013013003213003212546631262393012520010000200002001000020000130032130032112020110099100101001000010010000000131014174412951810000100001000010100130033130033130033130033130033
302041300329740000130017119408254010010125200121000012420000100005006214497148027091130013013003213003212546631262403010020010000200002001000020000130032130032112020110099100101001000010010000000131012162212951910000100001000010100130033130033130033130033130102
302041300329740000130057119408254010010100200001000010020000100005006214497148027090130013013003213003212546631262403010020010000200002001000020000130032130032112020110099100101001000010010000001131012162212951910000100001000010100130033130033130033130033130117
302041300329740000130017119408254010010100200001000010020000100005006214497148030570130013013003213003212546631262403010020010000200002001000020000130032130032112020110099100101001000010010000000131012162212951910000100001000010100130033130033130033130033130033
302041300329740000130017119408254010010100200001000010020000100005006214497148027090130013013003213003212546631262403010020010000200002001000020000130032130032112020110099100101001000010010000000131012162212951910000100001000010100130033130033130033130033130033
302041300329740000130017119408254010010100200001000010020000100005006214497148027090130013013003213003212546631262403010020010000200002001000020000130032130032112020110099100101001000010010000000131012162212951910000100001000010100130033130033130033130033130033
30204130032974000013001711940825401001010020000100081252000010000626621455414803008113001301300321300321254663126240301002001000020000200100002000013003213003211202011009910010100100001001000012700131012162212951910000100001000010100130033130033130033130033130033
3020413003297400001300171194082540100101002000010000100200001000050062145931480270901300130130032130032125466312624030100200100002000020010000200001300351300321120201100991001010010000100100007690131214174412951810000100001000010100130033130033130033130033130033
302041300329740000130017119408254010010125200001000010020000100005006214497148027091130013013003213003212546631262403010020010000200002001000020000130032130032112020110099100101001000010010000000131012162212951910000100001000010100130033130033130033130033130033

1000 unrolls and 10 iterations

Result (median cycles for code): 13.0032

retire (01)cycle (02)03191e3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)91inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc5cfd5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
3002413003597404261300171194082540010100102000410000102000010000506215001148041500130013013003213003212548931262933001020100002000020100002000013003613003211200211094101001010000101000000012703161212951910000100001000010010130033130033130033130033130033
30024130032974001300171194082540010100102000010000102000010000506214497148005281130013013003213003212548931262623001020100002000020100002000013003213003211200211090101001010000101000000012703161212952010000100001000010010130074130033130061130035130033
30024130032974001300171194082540010100102000010000102000010000506214497148005281130013013003213003212548931262623001020100002000020100002000013003213003611200211090101001010000101000000012705163212951910000100001000010010130033130033130033130033130033
30024130032974001300171194083840010100102000010000102000010000506215003148005281130013013003213003212548931262623001020100002000020100002000013003213003211200211090101001010000101000000012702162212951910000100001000010010130033130033130033130033130033
30024130032974001300171194082540010100102000010000102000010000506214497148005281130013013003213003212553231262623001020100002000020100002000013003213003211200211090101001010000101000006012703162212951910000100001000010010130057130035130036130069130034
300241300329740151300171194082540010100102000010000102000010000506214497148005281130013013003213003212548931262623001020100002000020100002000013003213003311200221090101001010000101000000012702162212951910000100001000010010130033130033130033130033130033
300241300329740013001711940825400101001020000100001020000100005062144971480052811300140130032130032125568191262733001020100002000020100002000013003213003211200211090101001010000101000000012704162412951910000100001000010010130033130033130033130033130033
30024130032974001300171194082540010100102000010000102000010000506214497148005281130013013003213003212554931262623001020100002000020100002000013003213003211200211090101001010000101000000012702163412951910000100001000010010130033130033130033131038130035
300241300351166001300171194082540010100102000010000102000010000506214497148005281130013013003213003212548931262623001020100002000020100002000013003213003211200211090101001010000101000000012704162212957710000100001000010010130033130033130033130033130033
300241300329740331300171194082540010100102000010000102000010000506214497148005281130013013003213003212551131262623001020100002000020100002000013003213003211200211090101001010000101000000012704162312952310000100001000010010130033130033130033130033130033

Test 3: throughput

Count: 8

Code:

  ucvtf h0, x8
  ucvtf h1, x8
  ucvtf h2, x8
  ucvtf h3, x8
  ucvtf h4, x8
  ucvtf h5, x8
  ucvtf h6, x8
  ucvtf h7, x8
  mov x8, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.3339

retire (01)cycle (02)031e1f3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a5a6a8a9acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020426711207002669402516010010080000800001008002080015500116895118841631266902670926709663206665816013520080020800202008002080020267602677111802011009910010080000100008000000011151172160026706080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080015500116895118841630266902670926709663206665816013520080020800202008002480020267862673311802011009910010080000100008000000011151170160026706080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080015500116895118841630266902670926709663206665816013520080020800202008002080020268122671811802011009910010080000100008000000011151170160026706080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080014500116895118789150266902670926709663206665816013520080020800202008002080024268162671411802011009910010080000100008000000011151171160026706080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080015500116895118841630266902670926709663206665816013520080020800202008002080020267092670911802011009910010080000100008000000011151171160026708080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080015500116895118841631266902670926709663206665816013520080020800202008002080024268182671511802011009910010080000100008000000011151170160026729080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080015500116895118841630266902671126709663206665816013420080020800202008002080020267812670911802011009910010080000100008000000011151170160026706080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080015500116895118841630266902670926709663206665816013520080020800202008002480020268532672111802011009910010080000100008000000011151170160026706080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080015500116895118841630266902670926709663206665816013520080020800202008002080020268562671511802011009910010080000100008000000011151170160026706080000800001002671026710267102671026710
16020426709207002669402516010010080000800001008002080015500116895118841631266902670926709663206665816013520080020800202008002480020267222683011802011009910010080000100008000000011151170160026706080000800001002671026710267102671026710

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.3339

retire (01)cycle (02)030b18191e1f3f4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a5a6a7a8a9acc2branch mispredict (cb)cfd5d6d9dbddinst fetch restart (de)e0ld/st retires (ed)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002426709207000002669402516001010800008000010800008000050116888018840320266902670926709665303668916001020800008000020800008000026709267091180021109101080000100008000000000050204160544267188000080000102671026710267102671026710
16002426709207000002669402516001010800008000010800008000050116888018840320266902670926709665303668916001020800008000020800008000026709267091180021109101080000100008000000000050204160533267068000080000102671026710267102671026710
16002426709207000002669402516001010800008000010800008000050116888018840320266902670926709665303668916001020800008000020800008000026709267091180021109101080000100008000001000050204160534267068000080000102671026710267102671026710
160024267092060069247042754122516001010800008013010800008000050116888018840320266942671026709679881149724616146522818938057020815188075928200273791018002110910108000010201448130300444552050204160544268458000080000102671026714267142671026710
160024267092071050616272114993021615721080910801301080558814245011908241942530026690267092670966530366891600102080000800002080189800002670926709118002110910108000010202548013300469902050643160533267068000080000102671026710267102671028209
1600242671421701154088274774322641602701280650809101080743814245012131701899180026690267162671966530366891600102080000800002080000800002670926709118002110910108000010000801321108780050204160545267068000080000102671026710267102676426710
160024267122070006026694025160010108000080000108000080000501168880188325602669826715267186659036695160010208000080000208000080000267092670911800211091010800001000080000000000502051610034267068000080000102671526719267162671026710
16002426713215000002669722516001010800008000010800008000050116888018840320266902670926709665303668916001020800008000020800008000026709267091180021109101080000100008000000090050204160044267068000080000102671026710267102671026710
16002426709207000002669402516001010800008000010800268020550118232718926521266942672026709665303668916001020800008000020800008000026709269861180021109101080000100008000000060150204160044267068000080000102671426710267102671026710
16002426709207000002669402516001010800008000010800008000050116888018840320266902671426709665303669016001020800008000020800008000026709267091180021109101080000100008000000000050203160053267068000080000102671026714267102671026710