Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UMAXV (vector, 16B)

Test 1: uops

Code:

  umaxv b0, v0.16b
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03090b191e3a3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a0accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004303723000006125472510001000100039816013018303730372414328951000100020003037303711100110000073216222629100030383038303830383038
10043037230000020125472510001000100039816013018303730372414328951000100020003037303711100110000073216212629100030383038303830383038
1004303723000006125472510001000100039816013018303730372414328951000100020003037303711100110000073216222629100030383038303830383038
1004303723000006125472510001000100039816013018303730372414328951000100020003037303711100110004073216222629100030383038303830383038
1004303722010006125472510001000100039816013018303730372414328951000100020003037303711100110000073216222629100030383038303830383038
1004303723100006125472510001000100039816013018303730372414328951000100020003037303711100110000073216222629100030383038303830383038
1004303722000006125472510001000100039816013018303730372414328951000100020003037303711100110000073216222629100030383038303830383038
1004303723000906125472510001000100039816013018303730372414328951000100020003037303711100110000073216222629100030383038303830383038
1004303722000006125472510001000100039816013018303730372414328951000100020003037303711100110000073216222658100030383038303830383038
1004303722000006125472510001000100039816013018303730372414328951000100020003037303711100110000073116222629100030383038303830383038

Test 2: Latency 1->2

Code:

  umaxv b0, v0.16b
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030818191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722500000822954725101001001000010010000500427716013001830037300372826432874510100200100002002000030037300371110201100991001001000010028371011611296330100001003003830038300383003830038
102043003722500000612954725101001041000010010000500427716003001830037300372826432874510100200100002002000030037300371110201100991001001000010049071011611296330100001003003830038300383003830038
102043003722500000612954725101001001000010010000500427716013001830037300372826432874510100200100002002000030037300371110201100991001001000010001871011611296330100001003003830038300383003830038
102043003722400000612954725101001001000010010000500427716013001830037300372826432874510100200100002002000030037300371110201100991001001000010002171011611296330100001003003830038300383003830038
102043003722510000612954725101001001000010010000500427716013001830085300372826432874510100200100002002000030037300371110201100991001001000010053371011611296330100001003003830038300383003830038
102043003722500000612954725101001001000010010000500427716003001830037300372826432874510100200100002002000030037300371110201100991001001000010038071011611296330100001003003830038300383003830038
102043003722500000612954725101001001000010010000500427716003001830037300372826432874510100200100002002000030037300371110201100991001001000010051071011611296330100001003003830038300383003830038
10204300372250000061295472510100100100001001000050042771600300183003730037282643287451010020010000204203323008430131211020110099100100100001000563675712511296330100001003003830038300383003830038
10204300372250128972086129547251010010010000100100005004279864030018300373008628271328745101002001000020020000300843003711102011009910010010000100015710225112963328100001003003830038300383003830038
102043003722400000612954725101001001000010010000500427716013001830037300372826432874510100200100002002000030037300371110201100991001001000010003371011611296330100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030408090b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500000000010329547251001010100001010000504277160130018300373003728286032876710010201000020200003003730037111002110910101000010000000300006402162229629010000103003830038300383003830038
100243003722500000000087829547251001010100001010000504277160130018300373003728286032876710010201000020200003003730037111002110910101000010000000000006402162229629010000103003830038300383003830038
10024300372250000000006129547251001010100001010000504277160130018300373003728286032876710010201000020200003003730037111002110910101000010000000000006402162229629010000103003830038300383003830038
10024300372240000000006129547251001010100001010000504277160130018300373003728286032876710010201000020200003003730037111002110910101000010000000000006402162229629010000103003830038300383003830038
10024300372250000000006129547251001010100001010000504277160030018300373003728286032876710010201000020200003003730037111002110910101000010000000000006402162229629010000103003830038300383003830038
10024300372250000000006129547251001010100001010000504277160030018300373003728286032876710010201000020200003003730037111002110910101000010000010000006402162229629010000103003830038300383003830038
10024300372250000000006129547251001010100001010000504277160030018300373003728286032876710010201000020200003003730037111002110910101000010000000000006402162229629010000103003830038300383003830038
10024300372240000000006129547251001010100001010000504277160030018300373003728286032876710010201000020200003003730037111002110910101000010000000000006402162229629010000103003830038300383003830038
10024300372250000000006129547251001010100001010000504277160030018300853003728286032876710010201000020200003003730037111002110910101000010000000000006402162229629010000103003830038300383003830038
10024300372240000000006129547251001010100001010000504277160130018300373003728286032876710010201000020200003003730037111002110910101000010000000000006402162229629010000103003830038300383003830038

Test 3: throughput

Count: 8

Code:

  umaxv b0, v8.16b
  umaxv b1, v8.16b
  umaxv b2, v8.16b
  umaxv b3, v8.16b
  umaxv b4, v8.16b
  umaxv b5, v8.16b
  umaxv b6, v8.16b
  umaxv b7, v8.16b
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)0309191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a6a8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042006115000030258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100200011151180160120036800001002004020040200402004020040
802042003915010030258018910080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040
802042003915000030258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040
802042003915000030258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040
8020420039150000505258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040
802042003915000030258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040
802042003915000030258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040
802042003915000030258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040
802042003915000030258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040
802042003915000030258010810080008100800205006401322002020039200399977699908012020080032200160064200392003911802011009910010080000100000011151180160020036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd0d2d5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420050150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010000502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400000020020200392003999960310019800102080000201600002003920039118002110910108000010003502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010010502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010000502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010000502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010000502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010000502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010000502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010000502000116112003680000102004020040200402004020040
8002420039150040258001010800001080000506400001020020200392003999960310019800102080000201600002003920039118002110910108000010000502000116112003680000102004020040200402004020040