Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UMLSL2 (by element, 2D)

Test 1: uops

Code:

  umlsl2 v0.2d, v1.4s, v2.s[1]
  movi v0.16b, 1
  movi v1.16b, 2
  movi v2.16b, 3

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10043037239612548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
10043037230612548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
100430372275612548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
100430372203462548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
10043037220822548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983131301830373037241532895100010003000303730371110011000073116112630100030383038303830383038

Test 2: Latency 1->1

Code:

  umlsl2 v0.2d, v1.4s, v2.s[1]
  movi v0.16b, 1
  movi v1.16b, 2
  movi v2.16b, 3

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030b191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8a9acc2cfd0d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037224000006129548251010010010000100100005004277313030018030037300372826532874510100200100002003000030037300371110201100991001001000010032030710021622296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313030018030037300372826532874510100200100002003000030037300371110201100991001001000010038000710021622296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313030018030037300372826532874510100200100002003000030037300371110201100991001001000010042000710021622296340100001003003830038300383003830038
1020430037224000006129548251010010010000100100005004277313030018030037300372826532874510100200100002003000030037300371110201100991001001000010027030710021622296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313030018030037300372826532874510100200100002003000030037300371110201100991001001000010048000710021622296340100001003003830038300383003830038
102043003723300310806129548251010010010000100100005004277313030018030037300372826532874510100200100002003000030037300371110201100991001001000010048030710121622296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130018030037300372826532874510100200100002003000030037300371110201100991001001000010052000712121622296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313030018030037300372826532874510100200100002003000030037300371110201100991001001000010046028080710121622296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313030018030037300372826532874510100200100002003000030037300371110201100991001001000010041000710121622296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130018030037300372826532874510100200100002003000030037300371110201100991001001000010048000710121622296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722506129548251001010100001010000504277313030018300373003728287328767100102010000203000030037300371110021109101010000100009640416222963010000103003830038300383003830038
100243003722506129548251001010100001010000504277313030018300373003728287328767100102010000203000030037300371110021109101010000100009640216322963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731303001830037300372828732876710010201000020300003003730037111002110910101000010000132640216222963010000103003830038300383003830038
100243003722507262954825100101010000101000050427731303001830037300372828732876710010201000020300003003730037111002110910101000010000126640216222963010000103003830038300383003830038
1002430037225056152954825100101010000101000050427731303001830037300372828732876710010201000020300003003730037111002110910101000010000135640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731303001830037300372828732876710010201000020300003003730037111002110910101000010000105640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731303001830037300372828732876710010201000020300003003730037111002110910101000010000138640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731303001830037300372828732876710010201000020300003003730037111002110910101000010000138640216222963010000103003830038300383003830038
100243003722506129548251001010100001010000504277313030018300373003728287328767100102010000203000030037300371110022109101010000100006640216232963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773130300183003730037282873287671001020100002030000300373003711100211091010100001000015640216222963010000103003830038300383013230038

Test 3: Latency 1->2

Code:

  umlsl2 v0.2d, v0.4s, v1.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03073f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9c2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722506729548251010010010000100100005004277313130018300373003728265328745101002001000020030000300373003711102011009910010010000100010071011611296340100001003003830038300383003830038
1020430037225061295482510100125100001001000062642773131300183003730037282653287451010020010000200300003003730037111020110099100100100001000000710116112963425100001003003830038300383003830038
1020430037232061295482510100125100001001000050042773131300183003730037282653287451010020010000200300003003730037111020110099100100100001000000710116112963425100001003003830038300383003830038
102043003722501554295482510100100100001001000050042773131300183003730037282653287451010020010000200300003003730037111020110099100100100001000000710117112963425100001003003830038300383003830038
10204300372250111829548251010010010000100100005004277313130018300373003728265328745101002041000020030000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020030000300373003711102011009910010010000100000071001611296340100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313030018300373003728265328745101002001000020030000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020030000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
102043003722506129548251012512510000125100006264277313030018300373003728265328744101002001000020030000300373003711102011009910010010000100000071011611296340100001003003830038300383003830038
1020430037225061295482510100100100001001000050042773130300183003730037282653287451010020010000200300003003730037111020110099100100100001000000710116112963425100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8a9accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002210910101000010002006402162229630010000103003830038300383003830038
1002430037225006129548251001010100001010000504277313130018300373003728287328767100102010000203000030037300371110021109101010000100030126402172229630010000103003830038300383008530038
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002110910101000010001006402162229630010000103003830038300383003830038
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002110910101000010001006402162229630010000103003830038300383003830038
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002110910101000010000006622162229630010000103003830038300383003830038
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002110910101000010001206402162229630010000103003830038300383003830038
100243003722500712954825100101010000101000050427731313001830037300372828732876710010201000020300003003730037111002110910101000010000006402162229630010000103003830038300383003830038

Test 4: Latency 1->3

Code:

  umlsl2 v0.2d, v1.4s, v0.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)91inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722501682954825101001001000010010000500427731303001830037300372826532874510100200100002003000030037300371110201100990100100100001000071011611296340100001003003830038300383003830038
10204300372250842954825101001001000010010000500427731303001830037300372826532874510100200100002003000030037300371110201100990100100100001000071011611296710100001003003830038300383003830038
102043003722504422954825101001001000010010000500427731303001830037300372826532874510100200100002003000030037300371110201100990100100100001000071011611296340100001003003830038300383003830038
102043003722501072954825101001001000010010000500427731313001830037300372826532874510100200100002003000030037300371110201100990100100100001000071011610296340100001003003830038300383003830038
10204300372250842954825101001001000010010000500427731313001830037300372826532874510100200100002003000030037300371110201100990100100100001000071011611296340100001003003830038300383003830038
102043003722501952954825101001001000010010000500427731303001830037300372826532874510100200100002003000030037300371110201100990100100100001000071011611296340100001003003830038300383003830038
10204300372240612954825101001001000010010000500427731313001830037300372826532874510100200100002003000030179300851110201100990100100100001000071011611296340100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731303001830037300372826532874510250200100002003000030037300371110201100990100100100001000071011611296340100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731303001830037300372826532874510100200100002003000030037300371110201100990100100100001000071011611296340100001003003830038300383003830038
10204300372240612954825101001001000010010000500427731303001830084300372826532874510100200100002003000030037300371110201100990100100100001000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030b181e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722400061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722500061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722500061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722500061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722500061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722500061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722500061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722400061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722500061295482510010101000010100005042773131300180300373003728287328785100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038
100243003722500061295482510010101000010100005042773131300180300373003728287328767100102010000203000030037300371110021109101010000100000006402162229630010000103003830038300383003830038

Test 5: throughput

Count: 8

Code:

  movi v0.16b, 0
  umlsl2 v0.2d, v8.4s, v9.s[1]
  movi v1.16b, 0
  umlsl2 v1.2d, v8.4s, v9.s[1]
  movi v2.16b, 0
  umlsl2 v2.2d, v8.4s, v9.s[1]
  movi v3.16b, 0
  umlsl2 v3.2d, v8.4s, v9.s[1]
  movi v4.16b, 0
  umlsl2 v4.2d, v8.4s, v9.s[1]
  movi v5.16b, 0
  umlsl2 v5.2d, v8.4s, v9.s[1]
  movi v6.16b, 0
  umlsl2 v6.2d, v8.4s, v9.s[1]
  movi v7.16b, 0
  umlsl2 v7.2d, v8.4s, v9.s[1]
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)03080b191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a7a8a9acc2cfd2d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204200651500000039258010010080000100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000000290101110116122006101600001002006520065200652006520065
160204200641500002101022580100100800001008000050064000020045200642006432280100200800002002400002030520064111602011009910010016000010000004001011101161120061161600001002006520065200652006520065
160204200641500040039258010010080000100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000000000101110116112006101600001002006520065200652006520065
160204200641500000039258010010080315100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000011030101112116112006101600001002006520065200652016820065
160204200641510000039258010010980000100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000000000101110116112006101600001002006520065200652006520065
160204200641500000081258010010080000100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000000000101110116112006101600001002006520065200652006520065
160204200641500000039258010010080000100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000000000101110116112006101600001002006520065200652006520065
160204200641500000039258010010080000100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000000000101110116112006101600001002006520065200652006520065
160204200641510000039258010010080000100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000000000101110116112006101600001002006520065200652006520065
160204200641510000039258010010080000100800005006400002004520064200643228010020080000200240000200642006411160201100991001001600001000000000101110116112006101600001002006520065200652006520065

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)03093f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8branch mispredict (cb)cdcfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0? int output thing (e9)eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002420084150051298001212800001280000626400001152003220051200513228001220800002024000020051200511116002110910101600001000010025843642521124200482201160000102005220052200522005220052
16002420051150045278001212800001280000626400001152003220051200513228001220800002024000020051200511116002110910101600001000010026843422542132200572402160000102006120061200612006120061
16002420051150045278001212800001280000626400001152003220051200513228001220800002024000020051203751116002110910101600001000010026853426821133200482201160000102005220052200522005220052
16002420051150045278001212800001280000626400001152003220051200603228001220800002024000020051200511116002110910101600001000010026852442522144200482201160000102005220052200522005220052
160024200601501137278001212800001280000626400001152004120051200513228001220800002024000020051200511116002110910101600001000110026848622521133200482201160000102005220052200522005220052
16002420051150045278001212800001280000626400001152003220051200513228001220800002024000020051200511116002110910101600001000010026852622521133200482201160000102005220061200522005220052
16002420051150045278001212800001280000626400001152003220051200603228001220800002024000020051200511116002110910101600001000010025855642521133200482201160000102005220052200522005220052
16002420051150045278001212800001280000626400001152003220051200513228001220800002024000020051200511116002110910101600001000010029850422521133200482201160000102005220052200522005220052
16002420051150066278001212800001280000626400001152003220051200513228001220800002024000020051200511116002110910101600001000010027840432521144200482201160000102005220052200522005220052
16002420051150045278001212800001280000626400001152003220051200513228001220800002024042020051200511116002110910101600001000010026852432521123200482201160000102005220052200522005220052

Test 6: throughput

Count: 12

Code:

  umlsl2 v0.2d, v12.4s, v13.s[1]
  umlsl2 v1.2d, v12.4s, v13.s[1]
  umlsl2 v2.2d, v12.4s, v13.s[1]
  umlsl2 v3.2d, v12.4s, v13.s[1]
  umlsl2 v4.2d, v12.4s, v13.s[1]
  umlsl2 v5.2d, v12.4s, v13.s[1]
  umlsl2 v6.2d, v12.4s, v13.s[1]
  umlsl2 v7.2d, v12.4s, v13.s[1]
  umlsl2 v8.2d, v12.4s, v13.s[1]
  umlsl2 v9.2d, v12.4s, v13.s[1]
  umlsl2 v10.2d, v12.4s, v13.s[1]
  umlsl2 v11.2d, v12.4s, v13.s[1]
  movi v12.16b, 13
  movi v13.16b, 14

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2503

retire (01)cycle (02)03080b18191e1f373f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a7a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
12020430058225000000090002512010010012001710012000050042836220300223004130039149730314997120100200120312200360000300393003911120201100991001001200001000000007610216113003601200001003004030040300403004230040
120204300392240000000430251201011001200001001200005009600000300223003930041149730314997120100200120000200360000300393003911120201100991001001200001000000007610116113003601200001003004030040300403004030040
120204300392240000000410251201001001200001001200005009600000300203003930039149730314999120100200120000200360000300393004111120201100991001001200001000000007610116113174501200001003004030041300403004130040
1202043003922500001801440251201181001200181001200005009600000300203003930040149730316706120100200120000200360000317483003911120201100991001001200001000000007610116113003601200001003004130040317493004031749
120204317482250000000416713251201001001200001001200005009900000300203003931748166530316706120100200120000200360000300403003911120201100991001001200001000000007610116113003601200001003004030041300403174930040
1202043003923700000004202512010010012000010012000050043995240317293174830039149730314997120100200120000200360000317483003911120201100991001001200001000000007610116113174501200001003004331749300403174930040
1202043003923800000004167132512011810012001810012000050042861840317293004030039149730314997120100200120000200360000300393174811120201100991001001200001000000007610116113174501200001003004030041300403004130040
120204300392380000001420251201001001200001001200005009900000300203174830039149730316706120100200120000200360000300393174811120201100991001001200001000000007610116113003601200001003004031749300403174930040
120204300392380000000416713251201181001200011001200005009600000300203003931748166530314998120100200120000200360000317483003911120201100991001001200001000000007610116113003601200001003004031749300403174930040
12020430039238000000722157149222312127612112102712112171063319954510314923136330911162870701585112146820212137020436355831215313551111202011009910010012000010001025595477821611231320231200001003092331511312893148331457

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2503

retire (01)cycle (02)0308090b18191e1f373f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9accfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0? int output thing (e9)eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
120024300392250000000070502512001010120000101200005096000030020300393003914996316730120010201200002036000030039300392112002110910101200001000000075200007160003430036000120000103004030040300403004030040
120024300392250000000070502512001010120000101200005096000030020300393003914996315019120010201200002036000030039300391112002110910101200001000000075200004160004330036000120000103092330040300403004030040
12002430039225000000006102512001010120000101200005096000030020300393003914996315019120010201200002036000030039300391112002110910101200001000000075200003160004430036000120000103004030040300403004030040
12002430039225000000004002512001010120000101200005096000030020300393003914996315019120010201200002036000030039300391112002110910101200001000000075200003160004430036000120000103004030040300403004030040
120024300392250000021006802512001010120000101200005096000030020300393098514996315019120010201200002036000030039303361112002110910101200001000000075200004160004330036100120000103004030040300403004030040
12002430039237000000004002512001010120000101200005096000030020300393003914996315019120010201200002036000030039300391112002110910101200001000000075200003160103430036000120000103004030040300403004030040
12002430039225000000004002512001010120000101200005096000030020300393003914996315020120010201200002036000030039300391112002110910101200001000000075200003160004430036000120000103004030040300403004030040
12002430039225000000004002512001010120001101200005096000030020300393003914996315019120010201200002036000030039300391112002110910101200001000000075200003160004330036000120000103004030040300403004030040
12002430039225000000004002512001010120018101200005096000030020300393003914996315019120010201200002036000030039300391112002110910101200001000000375200004160003430036000120000103004030095300403009530040
120024300392250100090040025120010101200001012000050439952430020300393003916677315019120010201200002036000030194300923112002110910101200001000010375203104160014330235005120000103023230089300403004030040