Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UMULL2 (by element, 2D)

Test 1: uops

Code:

  umull2 v0.2d, v0.4s, v1.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000073216112630100030383038303830383038
100430372206125482510001000100039831303018303730372415328951000100020003037303711100110000279573116112630100030383038303830383038
100430372206125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303723186125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372206125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831313018303730372415328951000100020003037303711100110000073116112700100030383038303830383038
100430372206125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038

Test 2: Latency 1->2

Code:

  umull2 v0.2d, v0.4s, v1.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0308090b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225000000061295482510100100100001001000050042773130300180300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
1020430037225000000061295482510100100100001001000050042773130300183300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001803003730037282650328745101002001000020020000300373003711102011009910010010000100000002868241222974235100001003040730424304163037430277
102043036922810187105979257222947618410212142100641331119275942881690301980304203041828295040288991132922211328228227803042030419911020110099100100100001002221221032871473112988828100001003018230323303703036930372
10204304182271018811917925810294752061022214610064150111926594288054030306030420304192829402828894113332301050522422660304153046410110201100991001001000010000000071011611296340100001003003830038300383003830038
1020430037225000000061295482510100100100001001000050042773130300180300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
1020430037225000000061295482510100100100001001000050042773130300180300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
1020430037233000000061295482510100100100001001000050042773130300180300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
1020430037225000000061295482510100100100001001000050042773130300180300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
1020430037225000000061295482510100100100001001000050042773130300180300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2cfd0d2d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250000000612954825100101010000101000050427731300300183003730037282873287671001020100002020000300373003711100211091010100001000000000640002162229630010000103003830038300383003830038
10024300372240000000612954825100101010000101000050427731310300183003730037282873287671001020100002020000300373003711100211091010100001000000000640002162229630010000103003830038300383003830038
10024300372250000000822954825100101010000101000050427731310300183003730037282873287671001020100002020000300373003711100211091010100001000001000640002162229630010000103003830038300383003830038
10024300372250000000612954825100101010000101000050427731300300183003730084282873287671001020100002020000300373003711100211091010100001000000000640002162229630010000103003830038300383003830038
10024300372250000000612954825100101010000101000050427731300300183003730037282873287671001020100002020000300373003711100211091010100001000000000640002162229630010000103003830038300383003830038
10024300372250000000612954825100101010000101000050427731310300183003730037282873287671001020100002020000300373003711100211091010100001000000000640002162229630010000103003830038300383003830038
10024300372250000000612954825100101010000101000050427731300300183003730037282873287671001020100002020000300373003711100211091010100001000000000640002162229630010000103003830038300383003830038
10024300372250000000612954825100101010000101000050427731300300183003730037282873287671001020100002020000300373003711100211091010100001000000000640002162229630010000103003830038300383003830038
10024300372250000000612954825100101010000101000050427731300300183003730037282873287671001020100002020000300373003711100211091010100001000001032640002162229630010000103003830038300383003830038
1002430085226000000061295482510010131004815108947142868120030234303693032228315342880411058261115122213023032230365811002110910101000010200022193630789003725329882310000103036930415303683035730086

Test 3: Latency 1->3

Code:

  umull2 v0.2d, v1.4s, v0.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372240000006129548251010010010000100100005004277313130018300373003728265032874510100200100002002000030037300371110201100991001001000010000000071611611296340100001003003830038300383003830038
10204300372250000006129548251010010010000100100005004277313030018300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
10204300372250000006129548251010010010000100100005004277313030018300373003728265032874510100200100002002000030037300371110201100991001001000010000200071011611296340100001003003830038300383003830038
10204300372250000006129548251010010010000100100005004277313130018300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
102043003722500000061295482510100100100001001000050042786700300183003730085282650328745101002001000020020000300373003711102011009910010010000100000253600710116112972110100001003013330134300853008530038
1020430037225002204526129548251010010010016113102985004277313030018300373003728265014287631010020010000200200003003730037111020110099100100100001002000191530872196212986930100001003013430324303233036030326
10204302282281102933616450029494651018514710048140110437244286812030270303693035928301038288701118822611035224224483032230362911020110099100100100001002012220232869173142988728100001003013530373304093037330374
102043037422711771056616457929476197102091511003215111192792428941103030630418304682829304028893107312281149122620996304503051710110201100991001001000010002000071011611296340100001003003830038300383003830038
1020430037225000018076829548251010010010000100100005004277313130018300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
10204300372250000006129548251010010010000100100005004277313030018300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b1e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)91inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037225000018729548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211090101010000100006404165529630010000103003830038300383003830038
100243003722500006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211090101010000100006406166629630010000103003830038300383003830038
100243003722500006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211090101010000100006405415529630010000103003830038300383003830038
1002430037225001208229548251001010100001010000504277313300183003730037282873287671001020104282020000300373003711100211090101010000100006405165529630010000103003830038300383003830038
100243003722500006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211090101010000100006405335529630010000103003830038300383003830038
100243003722500006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211090101010000100006405165629630010000103003830038300383003830038
100243003722500006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211090101010000100006406166629630010000103003830038300383003830038
100243003722500006129548251001010100001010000504282741300183003730037282873287671001020100002020000300373003711100211090101010000100006405165529630010000103003830038300383003830038
100243003722500006129548251001010100001010000504277313300183003730037282873287671001020100002020322300373003711100211090101010000100006406165629630010000103003830080300383018130038
10024300372250003526129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211090101010000100006404166629630010000103003830038300853003830228

Test 4: throughput

Count: 8

Code:

  umull2 v0.2d, v8.4s, v9.s[1]
  umull2 v1.2d, v8.4s, v9.s[1]
  umull2 v2.2d, v8.4s, v9.s[1]
  umull2 v3.2d, v8.4s, v9.s[1]
  umull2 v4.2d, v8.4s, v9.s[1]
  umull2 v5.2d, v8.4s, v9.s[1]
  umull2 v6.2d, v8.4s, v9.s[1]
  umull2 v7.2d, v8.4s, v9.s[1]
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)0307080b18191e1f3f5051inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8020420058150000009041025801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511021611200360800001002004020040200402004020040
8020420039149000000041025801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040
8020420039150000000041025801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040
8020420039150000000041025801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040
8020420039150000000041025801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040
8020420039150000000041025801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040
8020420039150000000041025801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040
80204200391500000000129025801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040
8020420039150000000041025801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040
8020420039150000000041025801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511011611200360800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03080b191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd5d6dbddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420048150000006892580010108000010800005064000012002020039200399996310019800102080000201600002003920039118002110910108000010000502010160222003680000102004020040200402004020040
80024200391500000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001000650202160622003680000102004020040200402004020040
80024200391500000040258001010800001080000506400000200202003920039999631001980010208000020160000200392003911800211091010800001000050203160622003680000102004020040200402004020040
80024200391500000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001000050206160632003680000102004020040200402004020040
80024200391500000040258001010800001080000506400000200202003920039999631001980010208000020160000200392003911800211091010800001000050202160362003680000102004020040200402004020040
80024200391500000040258001010800001080000506400000200202003920039999631001980010208000020160000200392003911800211091010800001000050206160222003680000102004020040200402004020040
80024200391500000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001042050202160222003680000102004020040200402004020040
80024200391500000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001000050206160222003680000102004020040200402004020040
80024200391500000040258001010800001080000506400000200202003920039999631001980010208000020160000200392003911800211091010800001000050202160262003680000102004020040200402004020040
80024200391500000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001000050202160622003680000102004020040200402004020040