Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UMULL2 (vector, 2D)

Test 1: uops

Code:

  umull2 v0.2d, v0.4s, v1.4s
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10043037233612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983131301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
100430372321612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037230612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037230612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037233612548251000100010003983131301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983131301830373037241532895100010002000303730371110011000073116112630100030383038303830383038

Test 2: Latency 1->2

Code:

  umull2 v0.2d, v0.4s, v1.4s
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0318191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372250036612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010007102162229634100001003003830038300383003830038
1020430037225000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010007101162229634100001003003830038300383003830038
1020430037225000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010007102162229634100001003003830038300383003830038
102043003722504306612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010007102162229634100001003003830038300383003830038
1020430037225000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010007102162229634100001003003830038300383003830038
1020430037225000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010007102162229634100001003003830038300383003830038
102043003722500151052954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010007102162229634100001003003830038300383003830038
1020430037225000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010007102162229634100001003003830038300383003830038
1020430037225116612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300372110201100991001001000010007102162229634100001003003830038300383003830038
1020430037224000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010007102162229634100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9aaacafc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250000360061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000006402162229630010000103003830038300383003830038
1002430037225000000061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000006402162229630010000103003830038300383003830038
10024300372240000210061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373008511100211091010100001000000000006402162229630010000103003830038300383003830038
1002430037225000000082295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000006402162229630010000103003830038300383003830038
1002430037225000000061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000006402162229630010000103003830038300383003830038
10024300372250000210061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000006402162229630010000103003830038300383003830038
1002430037225000000061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000006402162229630010000103003830038300383003830038
100243003722500004350061295482510010101000010100005042773131300183003730037282873287671015920100002020000300373003711100211091010100001000000000006402162229630010000103003830038300383003830038
100243003722500003900612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010002012019538027903933229904210000103027130322303703036930404
10024304602280117107154804809294851411004215100561811043764286812130234303683036828316322889811057211049022222943036830417811002110910101000010200010119505007782162229630010000103003830038300383003830038

Test 3: Latency 1->3

Code:

  umull2 v0.2d, v1.4s, v0.4s
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8a9accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
102043003722500000061295482510100100100001001000050042773130300183003730037282653287451010020010000200200003003730037111020110099100100100001000023171011611296340100001003003830038300383003830038
102043003722500000061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001000015671011611296340100001003003830038300383003830038
1020430037225000600612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
1020430037225000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
1020430037225000000612954825101001001000010010000500427731303001830085300372829032874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
102043003722400000061295482510100100100001001000050042773131300183003730037282653287451010020010000200200003003730037111020110099100100100001001020171011611296340100001003003830038300383003830038
1020430037225000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
10204300372250000001562954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
10204300372250000002512954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0318191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037226001210329548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001013640416222963010000103003830038300383003830038
1002430037225005153629548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
10024300372250006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
1002430037225003310329548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
100243003722540546129548251001010100001210149504277313300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
10024300372250006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
100243003722500025129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
10024300372240006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
10024300372250006129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001000640316222963010000103003830038300383003830038
10024300372250006129548251001010100001010149504277313300183003730037282873287671001020100002020000300373003711100211091010100001003640216222963010000103003830086300383003830038

Test 4: throughput

Count: 8

Code:

  umull2 v0.2d, v8.4s, v9.4s
  umull2 v1.2d, v8.4s, v9.4s
  umull2 v2.2d, v8.4s, v9.4s
  umull2 v3.2d, v8.4s, v9.4s
  umull2 v4.2d, v8.4s, v9.4s
  umull2 v5.2d, v8.4s, v9.4s
  umull2 v6.2d, v8.4s, v9.4s
  umull2 v7.2d, v8.4s, v9.4s
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8a9acc5cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042005915004125801001008000010080000500640000020020020039200399973399978010020080000200160000200392003911802011009910010080000100000151103161120036800001002004020040200402004020040
8020420039150021225801001008000010080000500640000120020020039200399973399978010020080000200160000200392003911802011009910010080000100003051101161120036800001002004020040200402004020040
8020420039150025150801001008000010080000500640000020020020039200399973399978010020080000200160000200392003911802011009910010080000100000051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000020020020039200399973399978010020080000200160000200392003911802011009910010080000100100051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000020020020039200399973399978010020080000200160000200392003911802011009910010080000100100051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000020020020039200399973399978010020080000200160000200392003911802011009910010080000100000051101161120036800001002004020040200402004020040
8020420039150041258010010080000100800005006400000200200200392003999733999780100200800002001600002003920039118020110099100100800001002400051101161120088800001002004020040200402004020040
8020420039150041258010010080000100800005006400000200200200392003999733999780100200800002001600002003920039118020110099100100800001005803051101161120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000020020020039200399973399978010020080000200160000200392003911802011009910010080000100200051101162120036800001002004020040200402004020040
802042003915004125801001008000010080000500640000020020020039200399973399978010020080000200160000200392003911802011009910010080000100100051101161120036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03080b1e3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9facc5branch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80024200481500000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020116112003680000102004020040200402004020040
80024200391500000402580010108000010800005064000020020200392003999963100198001020800002016000020111201021180021109101080000100005020116112003680000102004020040200402004020040
800242003915000360402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020116112003680000102004020040200402004020040
800242003915000004025800101080000108000050640000200202003920039999631001980010208000020160000200392003911800211091010800001084015020116112003680000102004020040200402004020040
80024200391500000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020116112003680000102004020040200402004020040
80024200391500000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000103005020116112003680000102004020040200402004020040
80024200391500100402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000103005020116112003680000102004020040200402004020040
80024200391500000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000100005020116112003680000102004020040200402004020040
80024200391500000402580010108000010800005064000020020200392003999963100198001020800002016000020039200391180021109101080000103005020116112003680000102004020040200402004020040
8002420039150000040258001010800001080000506400002002020039200399996310019800102080000201600002003920039118002110910108000010126005020116112003680000102004020040200402004020040