Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UMULL2 (vector, 8H)

Test 1: uops

Code:

  umull2 v0.8h, v0.16b, v1.16b
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10043037230612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037230612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
100430372301052548251000100010003983130301830373037241532914100010002000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037230612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037230612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037220972548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983130301830843037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037233612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
10043037220612548251000100010003983131301830373037241532895100010002000303730371110011000073116112630100030383038303830383038

Test 2: Latency 1->2

Code:

  umull2 v0.8h, v0.16b, v1.16b
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030a191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000013507102162229634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000018007102162229634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000017407102162229634100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000307102162229634100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773133001830037300372826532874510266200100002002000030037300371110201100991001001000010050307102162229634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000013807102162229634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000014407102162229634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000112007102162229634100001003003830038300383003830038
1020430037225000061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000307102162229634100001003003830038300383003830038
1020430037225000061295482510100100100001001000060442773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000007102162229634100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a7a8a9acc2branch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500000006129548251001010100001010000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722500000006129548251001010100001010000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722400000006129548251001010100001010000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830085
10024300372250000000612954825100101010000101000005042786701300183003730037282873287671001020100002020000300373003711100211091010100001000000174006402162229630010000103003830038300383003830038
100243003722500000006129548251001010100001010000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722500000006129548251001010100001010000050427731303001830037300372828732876710010201000020200003003730084111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722500000006129548251001010100001010000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722500000006129548251001010100001010000050427731313006530037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
1002430037225000012006129539251001010100001010000050427731313001830037300372828732876710010201000020200003003730037211002110910101000010000142810006402162229630010000103003830038300383003830038
100243003722500000006129548251001010100001010000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038

Test 3: Latency 1->3

Code:

  umull2 v0.8h, v1.16b, v0.16b
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a7a8a9accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372250000003690294941481018613410048138108946354285455130018300373003728265032874510100200100002002000030037300371110201100991001001000010000000671021611296340100001003003830038300383003830038
102043003722500000061295482510100100100001001000050042773130300183003730037282650328745101002001000020020000300373003711102011009910010010000100020301571011611296340100001003003830038300383003830038
10204300372240000007129548251010010010000100100005004277313130018300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
102043003722500000061295482510100100100001001000050042773130300183003730037282650328745101002001000020020000300373003711102011009910010010000100000560071011611296340100001003003830038300383003830038
102043003722400000094329548251010010010000100100005004277313030018300373003728265032874510100200100002002000030037300371110201100991001001000010000010071011611296340100001003003830038300383003830038
10204300372250000006129548251010010010000100100005004277313130018300373003728265032874510100200100002002000030037300371110201100991001001000010000010071011611296340100001003003830038300383003830038
10204300372250000006129548251010011210000100100005004277313030018300373003728265032874510100200100002002000030037300371110201100991001001000010000010071011611296340100001003003830038300383003830038
102043003722500000061295482510100100100001001000050042773130300183003730037282650328745101002001000020020000300373003711102011009910010010000100000709371011611296340100001003003830038300383003830038
10204300372250000006129548251010010010000100100005004277313130018300373003728265032874510100200100002002000030037300371110201100991001001000010000000071011611296340100001003003830038300383003830038
10204300372250000006129548251010010010000100100005004277313030018300373003728265032874510100200100002002000030037300371110201100991001001000010000020071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250612954825100101010000151000050427731330018300373003728287328767100102010000202000030037300371110021109101010000102100640216222963010000103003830038300383003830038
10024300372250612954825100101010000101000050427731330018300373003728287328767100102010000202000030037300371110021109101010000104100640216222963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773133001830037300372828732876710010201000020200003003730037111002110910101000010130640216222963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773133001830037300372828732876710010201000020200003003730037111002110910101000010030640216222963010000103003830038300383003830038
100243003722506129548251001010100001010000504277313300183003730037282873287671001020100002020000300373003711100211091010100001001860640216222963010000103003830038300383003830038
10024300372250612954825100101010024101000050427731330018300373003728287328767100102010000202000030037300371110021109101010000101900640216222963010000103003830038300383003830038
10024300372240612954825100101010000101000050427731330018300373003728287328767100102010000202000030037300371110021109101010000104800640216222963010000103003830038300383003830038
10024300372255161295482510010101000010100005042773133001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773133001830037300372828732876710010201000020200003003730037111002110910101000010130640216222963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773133001830037300372828732876710010201000020200003003730037111002110910101000010001640216222963010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  umull2 v0.8h, v8.16b, v9.16b
  umull2 v1.8h, v8.16b, v9.16b
  umull2 v2.8h, v8.16b, v9.16b
  umull2 v3.8h, v8.16b, v9.16b
  umull2 v4.8h, v8.16b, v9.16b
  umull2 v5.8h, v8.16b, v9.16b
  umull2 v6.8h, v8.16b, v9.16b
  umull2 v7.8h, v8.16b, v9.16b
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200491500000004125801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511031623200360800001002004020040200402004020040
8020420039150000000114525801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511031623200360800001002004020040200402004020040
8020420039150000000412580100100800001008000050064000002002020039200399973399978010020080000200160000200392003911802011009910010080000100000001680511031632200360800001002004020040200402004020040
80204200391500000004125801001008000010080000616640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511021622200360800001002004020040200402004020040
80204200391500000004125801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511021623200360800001002004020040200402004020040
8020420039150000060113525801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511021623200360800001002004020040200402004020040
8020420039150000000412580100100800001008000050064000002002020039200399973399978010020080000200160000200392003911802011009910010080000100000001410511031632200360800001002004020040200402004020040
80204200391500000604125801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000030511031623200360800001002004020040200402004020040
80204200391500000004125801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511021623200360800001002004020040200402004020040
80204200391500000004125801001008000010080000500640000020020200392003999733999780100200800002001600002003920039118020110099100100800001000000000511031633200360800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030b1e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242003915000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001002005020416432003680000102004020040200402004020040
800242003915000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001002035020416432003680000102004020040200402004020040
8002420039150000402580010108000010800005064240212002020039200399996310019800102080000201600002003920039118002110910108000010000245020316442003680000102004020040200402004020040
800242003914900040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001001005020316342003680000102004020040200402004020040
800242003915000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001000005020416442003680000102004020040200402004020040
800242003915000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001000095020416432003680000102004020040200402004020040
800242003915000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001000005020416342003680000102004020040200402004020040
800242003915000040808001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001000005020416442003680000102004020040200402004020040
800242003915000040258001010800001080000506400001200202008920039999631001980010208010720160418201412014511800211091010800001002005020416442003680000102004020040200402004020040
800242003915000040258001010800001080000506400001200202003920039999631001980010208000020160000200392003911800211091010800001002005020416342003680000102004020040200402004020040