Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UMULL (by element, 2D)

Test 1: uops

Code:

  umull v0.2d, v0.2s, v1.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372308225482510001000100039831313018303730372415328951000100020003037303711100110000373116112630100030383038303830383038
100430372306125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372206125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030853085303830383038
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372206125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372206125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000373116112630100030383038303830383038
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372206125482510001000100039831303018303730372415328951000100020003037303711100110001073116112630100030383038303830383038

Test 2: Latency 1->2

Code:

  umull v0.2d, v0.2s, v1.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722506129548251010010010000100100005004277313300183003730037282726287401010020010008200200163003730037111020110099100100100001000001117170160029647100001003003830038300383003830038
102043003722406129548251010010010000100100005004277313300183003730037282726287401010020010008200200163003730037111020110099100100100001000001117180160029646100001003003830038300383003830038
102043003722406129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001003000007101161129634100001003003830038300383003830038
102043003722508229548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000000007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000000007101161129634100001003003830038300383003830038
1020430037225010329548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000000007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000000007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000000007101161129634100001003003830038300383003830038
102043003722406129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000000007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000000007101161129634100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0307080a0b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037225000000000612954825100101010000101000050427731313001830037300372828703287671001020100002020000300373003711100211091010100001000000006403162229630010000103003830038300383003830038
1002430037225000000000612954825100101010000101000050427731313001830037300372828703287671001020100002020000300373003711100211091010100001000000006402162229630010000103003830038300383003830038
1002430037225000000000612954825100101010000101000050427731313001830037300372828703287671001020100002020000300373003711100211091010100001000000006403162229630010000103018030038300383003830038
10024300372250000000006129548251001010100001010000504277313130018300373003728287032876710010201000020200003003730037111002110910101000010000000064021612229630010000103003830038300383003830038
10024300372250000000001262954825100101010000101000050427731313001830037300372828703287671001020100002020000300373003711100211091010100001000000006402162229630010000103003830038300383003830038
1002430037226000000000612954825100101010000101000050427731313001830037300372828703287671001020100002020000300373003711100211091010100001000000007073162229630010000103003830038300383003830038
1002430037225000000000612954825100101010000101000050427731313001830037300372828703287671001020100002020000300373003711100211091010100001000000006402162229630010000103003830038300383003830038
1002430037225000000000612954825100101010000101000050427731313001830037300372828703287671001020100002020000300373003711100211091010100001000010006403162229630010000103003830038300383003830038
1002430037224000000000612954825100101010000101000050427731313001830037300372828703287671001020100002020000300373003711100211091010100001000000006402162229630010000103003830038300383003830038
10024300372250000005100612954825100101010000101000050427731313001830037300372828773287671001020100002020000300373003711100211091010100001000000006402162229630010000103003830038300383003830038

Test 3: Latency 1->3

Code:

  umull v0.2d, v1.2s, v0.s[1]
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0308191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225004506129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
102043003722400006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
1020430037225003906129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161329634100001003003830038300383003830038
102043003722500006129548251010010010000100101485004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
102043003722500606129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129634100001003003830038300383003830038
102043003722500006129548251010010010000100100005004277313300183003730037282653287451010020010000200200003003730037111020110099100100100001000007101161129706100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372251212429548251001010100001010000504277313130018300373003728287032876710010201000020200003003730037111002110910101000010000640416222963010000103003830038300383003830038
100243008423306129548251001010100001010000504277313030018300373003728287032876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
100243003723006129548251001010100001010000504277313030018300373003728287032876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
1002430037229396129548251001010100001010000504277313030018300373003728287032876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
1002430037229276129548251001010100001010000504277313030018300373003728287032876710010201000020200003003730037111002110910101000010030640216222963010000103003830038300383003830038
100243003722506129548251001010100001010000504277313130018300373003728287032876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
100243003722524310329548251001010100001010000504277313030018300373003728292032882410010201000020200003003730037211002110910101000010130640216222963010000103003830038300383003830038
100243003722533310329548251001010100001010000504277313030018300373003728287032876710010201000020200003003730037111002110910101000010030640216222963010000103003830038300383003830038
10024300372257210329548251001010100001010000504278670030018300373003728287032876710010201000020200003003730037111002110910101000010030640216222963010000103003830038300383017030038
100243003724106129548251001010100001010000504277313030018300373003728287032876710010201000020200003003730037111002110910101000010000640216322963010000103003830133301693003830086

Test 4: throughput

Count: 8

Code:

  umull v0.2d, v8.2s, v9.s[1]
  umull v1.2d, v8.2s, v9.s[1]
  umull v2.2d, v8.2s, v9.s[1]
  umull v3.2d, v8.2s, v9.s[1]
  umull v4.2d, v8.2s, v9.s[1]
  umull v5.2d, v8.2s, v9.s[1]
  umull v6.2d, v8.2s, v9.s[1]
  umull v7.2d, v8.2s, v9.s[1]
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa7a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042004815000412580100100800001008000050064000012002020039200399973399978010020080000200160000200392003911802011009910010080000100000051102161120036800001002004020040200402004020040
8020420039150004125801001008000010080000500640000120020200392003999733999780100200800002001600002003920039118020110099100100800001000104851101161120036800001002004020040200402004020040
802042003915000412580100100800001008000050064000002002020039200399973399978010020080000200160000200392003911802011009910010080000100000051101161120036800001002004020040200402004020040
8020420039150002312580100100800001008000050064000002002020039200399973399978010020080000200160000200392003911802011009910010080000100050051101161120036800001002004020040200402004020040
802042003914900412580100100800001008000050064000002002020039200399973399978010020080000200160000200392003911802011009910010080000100000051101161120036800001002004020040200402004020040
802042003915000412580100100800001008000050064000012002020039200399973399978010020080000200160000200392003911802011009910010080000100000351101161120036800001002004020040200402004020040
802042003915000412580100100800001008000050064000012002020039200399973399978010020080000200160000200392003921802011009910010080000100010351101161120036800001002004020040200402004020040
8020420039150004212580100100800001008000050064000012002020039200399973399978010020080000200160000200392003911802011009910010080000100050351341161120036800001002004020040200402004020040
802042003915000412580100100800001008000050064000012002020039200399973399978010020080000200160000200392003911802011009910010080000100000051101161120036800001002004020040200402004020040
802042003915000412580100100800001008000050064000012002020039200399973399978010020080000200160000200392003911802011009910010080000100000051101161120036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8c2cfd5d6dbddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242004815004025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
800242003915004025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
800242003915004025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
80024200391502584025800101280000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
800242003915004025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
800242003915004025800101080000108000050640000120020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
80024200391503604025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
800242003915004025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
800242003915041461025800101080000108000050640000020020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040
800242003915094025800101080000108000050640000120020200392003999963100198001020800002016000020039200391180021109101080000100050202160222003680000102004020040200402004020040