Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UMULL (vector, 2D)

Test 1: uops

Code:

  umull v0.2d, v0.2s, v1.2s
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)033f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8a9aaaccfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004303723612548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
10043037223032548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
10043037231292548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303723822548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303723612548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303722822548251000100010003983131301830373037241532895100010002000308530371110011000000073116112630100030383038303830383038
1004303723612548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303722612548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303723612548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038
1004303722612548251000100010003983131301830373037241532895100010002000303730371110011000000073116112630100030383038303830383038

Test 2: Latency 1->2

Code:

  umull v0.2d, v0.2s, v1.2s
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8accficache miss (d3)d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037224000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710021611296340100001003003830038300383003830038
1020430037224000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130054300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038
1020430037224000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038
1020430037225000006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000710011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030818191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9acc5cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500030612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500000612954825100101010000101000050427731303001830037300372829232876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500030612954825100101010000101000050427731303001830037300372830032876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722400000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000306402162229630010000103003830038300383003830038
100243003722500000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
1002430037225000005362954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038

Test 3: Latency 1->3

Code:

  umull v0.2d, v1.2s, v0.2s
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080a0b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722500000007112954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
102043003722500000007262954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
10204300372240000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038
10204300372250000000612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000000000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03081e1f3f4e5051inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8a9accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500061295480251001010100001010000504277313030018030037300372828732876710010201000020200003003730037111002110910101000010000006403162229630010000103003830038300383003830038
100243003722500061295480251001010100001010000504277313130018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500061295480251001010100001010000504277313130018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500061295480251001010100001010000504277313030018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500061295480251001010100001010000504277313130018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722400061295480251001010100001010000504277313030018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722510061295480251001010100001010000504277313130018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500061295480251001010100001010000504277313030018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722400082295480251001010100001010000504277313030018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038
100243003722500061295480251001010100001010000504277313030018030037300372828732876710010201000020200003003730037111002110910101000010000006402162229630010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  umull v0.2d, v8.2s, v9.2s
  umull v1.2d, v8.2s, v9.2s
  umull v2.2d, v8.2s, v9.2s
  umull v3.2d, v8.2s, v9.2s
  umull v4.2d, v8.2s, v9.2s
  umull v5.2d, v8.2s, v9.2s
  umull v6.2d, v8.2s, v9.2s
  umull v7.2d, v8.2s, v9.2s
  movi v8.16b, 9
  movi v9.16b, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200581550041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051103161120036800001002004020040200402004020040
802042003915000412580100100800001008000050064000012002020039200399973310024801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
80204200391500041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
80204200391500041258010010080000100800005006400001200202003920039997339997801002008013620016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
80204200391500041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
80204200391500041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000351101161120036800001002004020040200402004020040
80204200391500041258010010080000100800005006400000200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
80204200391500041258010010080000100800005006400000200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
80204200391500041258010010080000100800005006400000200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040
80204200391500041258010010080000100800005006400001200202003920039997339997801002008000020016000020039200391180201100991001008000010000051101161120036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03191e3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acbranch mispredict (cb)cfd5d6ddinst fetch restart (de)e0eb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420059150000402580010108000010800005064000001200202003920039999631001980010208000020160000200392003911800211091010800001000050202162220036080000102004020040200402004020040
800242003915000011032580010108000010800005064000001200202003920039999631001980010208000020160000200392003911800211091010800001000050202164420036080000102004020040200402004020040
8002420039150000402580010108000010800005064000001200202003920039999631001980130208000020160000200392003911800211091010800001000050202162420036080000102004020040200402004020040
800242003915002730402580010108000010800005064000001200202003920039999631001980010208000020160000200392003911800211091010800001000050203163420036080000102004020040200402004020040
8002420039150000402580010108000010800005064000001200202003920039999631001980010208000020160000200392003911800211091010800001000050202164220036080000102004020040200402004020040
800242003915003060402580010108000010800005064000001200202003920039999631001980010208000020160000200392003911800211091010800001000050204163320036080000102004020040200402004020040
8002420039150000402580010108000010800005064000001200202003920039999631001980010208000020160000200392003911800211091010800001000050203163320036080000102004020040200402004020040
800242003915004320402580010108000010800005064000001200202003920039999631001980010208000020160000200392003911800211091010800001000050203164220036080000102004020040200402004020040
800242003915002580402580010108000010800005064000000200202003920039999631001980010208000020160000200392003911800211091010800001000050202162220036080000102004020040200402004020040
800242003915002100402580010108000010800005064000000200202003920039999631001980010208000020160000200392003911800211091010800001000050204163320036080000102004020040200402004020040