Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UQRSHRN2 (4S)

Test 1: uops

Code:

  uqrshrn2 v0.8h, v1.4s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a0a1a6a7a8a9acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372300001508225482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112768100030383038303830383038
10043037220000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
10043037230000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
10043037220000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
100430372200000061254825100010001000398313130183037303724153289510001000200030373037111001100000000090073116112630100030383038303830383038
10043037220010006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
10043037230000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
10043037230000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
10043037220000006125482510001000100039831313018303730372415328951000100020003037303711100110000000000073116112630100030383038303830383038
10043037230000006125482510001000100039831313018303730372415328951000100020003037303711100110000000100073116112630100030383038303830383038

Test 2: Latency 1->1

Code:

  uqrshrn2 v0.8h, v1.4s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03081e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225012612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000037102162229634100001003003830038300383003830038
1020430037225031032954825101371001000010010000500427731313001830037300372827932874510582200100002002000030086300371110201100991001001000010092007102162229634100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000007102162229634100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000007102162229634100001003003830038300383003830038
1020430037225015612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000007102162229634100001003003830038300383003830038
102043003722400612954825101001001000010010000500427731313001830037300372826532874510100204100002002034830037300371110201100991001001000010000007102162229634100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000007102162229634100001003003830038300383003830038
102043003722410612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000007102162229634100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000007102162229634100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000007102162229634100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722518612954825100101010000101000050427731313001830037300372828715287861001020100002020000300373003711100211091010100001001640224222963010000103003830038300383003830038
10024300372252461295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
1002430037225661295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001020640216222963010000103003830038300383003830038
1002430037225661295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
10024300372251861295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
1002430037225661295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
1002430037225661295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
10024300372251261295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
10024300372253061295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
1002430037225661295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038

Test 3: Latency 1->2

Code:

  uqrshrn2 v0.8h, v0.4s, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0304070a191e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372250110006129547251010010010000100100005004277160030018300373003728271628740101002001000820020016300373003711102011009910010010000100001117171161129647100001003003830038300383003830038
10204300372250110006129547251010010010000100100005004277160130018300373003728271628741101002001000820020016300373003711102011009910010010000100001117181161129645100001003003830038300383003830038
10204300372251000006129547251010010010000100100005004277160130018300853003728271728741101002001000820020016300373003711102011009910010010000100001117181161129645100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018300373003728271728741101002001000820020016300373003711102011009910010010000100001117171161129646100001003003830038300383003830038
10204300372251000006129547251010010010000100100005004277160130018300373003728271728740101002001000820020016300373003711102011009910010010000100001117181161129646100001003003830038300383003830038
10204300372241000006129547251010010010000100100005004277160130018300373003728271628740101002001000820020016300373003711102011009910010010000100001117171161129645100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018300373003728271628740101002001000820020016300373003711102011009910010010000100001117171161129646100001003003830038300383003830038
10204300372241000006129547251010010010000100100005004277160130018300373003728271728740101002001000820020016300373003711102011009910010010000100001117181161129645100001003003830038300383003830038
10204300372251000006129547251010010010000100100005004277160130018300373003728271728741101002001000820020016300373003711102011009910010010000100001117171161129645100001003003830038300383003830038
10204300372251000006129547251010010010000100100005004277160130018300373003728271728740101002001000820020016300373003711102011009910010010000100001117181161129646100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250000240822954725100101010000101000050427716030018300373003728286328767100102010000202000030037300371110021109101010000100003306402162229629010000103003830038300383003830038
100243003722500000061295472510010101000010100005042771603001830037300372828632876710010201000020200003003730037111002110910101000010000006402162229629010000103003830038300383003830038
100243003722400000061295472510010101000010100005042771603001830225300372828632876710010201000020200003003730037111002110910101000010000006402162229629010000103003830038300383003830038
100243003722500000061295472510010101000010100005042771603001830037300372828632876710010201000020200003003730037111002110910101000010000006402162229629010000103003830038300383003830038
100243003722500000061295472510010101000010100005042771603001830037300372828632876710010201000020200003003730037111002110910101000010000006402162229629010000103003830038300383003830038
100243003722500000061295472510010101000010100005042771603001830037300372828632876710010201000020200003003730037111002110910101000010000006402162229629010000103003830038300383003830038
100243003722500000061295472510010101000010100005042771603001830037300372828632876710010201000020200003003730037111002110910101000010010006402162229629010000103003830038300383003830038
1002430037225000012061295472510010101000010100005042771603001830085300372828632876710010201000020200003003730037111002110910101000010000006402162229629010000103003830038300383003830038
1002430037225000000105295472510010101000010100005042771603001830037300372828632876710010201000020200003003730037111002110910101000010000006402162229629010000103003830038300383003830038
100243003722500000061295472510010101000010100005042771603001830037300372828632876710010201000020200003003730037111002110910101000010000006402162229629010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  uqrshrn2 v0.8h, v8.4s, #3
  movi v1.16b, 0
  uqrshrn2 v1.8h, v8.4s, #3
  movi v2.16b, 0
  uqrshrn2 v2.8h, v8.4s, #3
  movi v3.16b, 0
  uqrshrn2 v3.8h, v8.4s, #3
  movi v4.16b, 0
  uqrshrn2 v4.8h, v8.4s, #3
  movi v5.16b, 0
  uqrshrn2 v5.8h, v8.4s, #3
  movi v6.16b, 0
  uqrshrn2 v6.8h, v8.4s, #3
  movi v7.16b, 0
  uqrshrn2 v7.8h, v8.4s, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2510

retire (01)cycle (02)03080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020420091151000000292580116100800161008002850064019602015120065200656128012820080028200160056200652006511160201100991001001600001000000000011110119216002006201600001002006620157200662006620066
16020420065150000060292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119016002006201600001002006620066200662006620066
16020420065151000000292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119016002006201600001002006620066200662006620066
16020420065150000000292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119016002006201600001002006620066200662006620066
16020520065150000000292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119016002006201600001002006620066200662006620066
16020420065150000000292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119016002006201600001002006620066200662006620066
160204200651500000120292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119016002006201600001002006620066200662006620066
16020420065150000000292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119016002006201600001002006620066200662006620066
16020420065150000000292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000020000011110119016002006201600001002006620066200662006620066
16020420065150000030292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119016002006201600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)030818191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa9acc2branch mispredict (cb)cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002420077150000045258001010800001080000506400001120031200462005032280010208000020160000200462005011160021109101016000010000010026312320422322004730160000102005120051200512005120051
16002420046150000066258001010800001080000506400001120027200502004632280010208000020160000200502005011160021109101016000010000010028621324412332004715160000102004720047200512004720047
16002420046151000045258001010800001080000506400001120031200462005032280010208000020160000200502005011160021109101016000010000010026321320222332004315160000102004720047200472005120047
16002420046150000045258001010800001080000506400000120027200502005032280010208000020160000200502005011160021109101016000010000010028622324422322004730160000102004720047200472005120047
16002420050150000051258001010800001080000506400000120225200462004632280010208000020160000200462004611160021109101016000010000010029611320221232004315160000102004720149200512013920047
16002420046150000045258001010800001080000506400001120027200462004632280010208000020160000200462004611160021109101016000010000010026311320212322004315160000102004720047200472005120051
16002420046150000045258001010800001080000506400000120031200502004632280010208000020160000200502005011160021109101016000010000010026311320412342004730160000102004720051200472005120047
16002420046150001051258001010800001080000506400001120027200462004632280010208000020160000200462005011160021109101016000010000010026312220212232004315160000102004720047200472005120047
16002420046150000045258001010800001080000506400000120027200462004632280010208000020160000200462004611160021109101016000010000010026611320211322004315160000102004720047200512004720047
16002420046150000045258001010800001080000506400001120027200462005032280010208000020160000200462004611160021109101016000010000010026321324211332004315160000102004720051200472004720047

Test 5: throughput

Count: 16

Code:

  uqrshrn2 v0.8h, v16.4s, #3
  uqrshrn2 v1.8h, v16.4s, #3
  uqrshrn2 v2.8h, v16.4s, #3
  uqrshrn2 v3.8h, v16.4s, #3
  uqrshrn2 v4.8h, v16.4s, #3
  uqrshrn2 v5.8h, v16.4s, #3
  uqrshrn2 v6.8h, v16.4s, #3
  uqrshrn2 v7.8h, v16.4s, #3
  uqrshrn2 v8.8h, v16.4s, #3
  uqrshrn2 v9.8h, v16.4s, #3
  uqrshrn2 v10.8h, v16.4s, #3
  uqrshrn2 v11.8h, v16.4s, #3
  uqrshrn2 v12.8h, v16.4s, #3
  uqrshrn2 v13.8h, v16.4s, #3
  uqrshrn2 v14.8h, v16.4s, #3
  uqrshrn2 v15.8h, v16.4s, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2503

retire (01)cycle (02)03070a0b18191e1f3f5051inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440039300110000030400232516010810016000810016002050012801321400204003940039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004004040040400404004040040
1602044003930011000003002516010810016000810016002050012801320400204003940039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004004040040400404004040040
1602044003929911000003002516010810016000810016002050012801321400204003940039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004009040040400404004040040
1602044003929911000003002516010810016000810016002050012801320400204009040039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004004040040400404004040040
1602044003930011000003002516010810016000810016002050012801320400204003940039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004004040040400404004040040
1602044003929911000003002516010810016000810016002050012801320400204003940039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004004040040400404004040040
1602044003929911000007202516031110016000810016002050012801320400204003940039199776199901601202001600322003200644003940039111602021009910010016000010000011110118116114003601600001004004040040400404004040040
1602044003929911000003002516010810016000810016002050012801320400204003940039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004004040040400404004040040
1602044003929911000003002516010810016000810016002050012801320400204003940039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004004040040400404004040040
16020440039300110000069502516010810016000810016002050012801321400204003940039199776199901601202001600322003200644003940039111602011009910010016000010000011110118116114003601600001004004040040400404004040040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)03040a191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9accdcfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600244005030501015052251600101016000010160000501280000010400204003940039199963200191600102016000020320000400394003911160021109101016000010000001002462251642245400362012160000104004040040400404004040040
160024400393100000052251600101016000010160000501280000310400204003940039199963200191600102016000020320000400394003911160021109101016000010000001002262151621133400362012160000104004040040400404004040040
16002440039305000004625160010101600001016000050128000041040020400394003919996320019160010201600002032000040039400391116002110910101600001000000100223213162213440036406160000104004040040400404004040040
16002440039306000004625160010101600001016000050128000041040020400394003919996320019160010201600002032000040039400391116002110910101600001000000100453124162124440036206160000104004040040400404004040040
160024400393000000052251600101016000010160000501280000210400204003940039199963200191600102016000020320000400394003911160021109101016000010010301002262241621154400362012160000104004040040400404004040040
160024400393000001204625160010101600001016000050128000011040020400394003919996320019160010201600002032000040039400391116002110910101600001000030100243124162124540036416160000104004040040400404004040040
16002440039310000120753251600101016000010160000501280000410400204003940039199963200191600102016000020320000400394003911160021109101016000010000001002431241621244400362012160000104004040040400404004040040
16002440039300000004625160010101600001016000050128000041040020400394003919996320019160010201600002032000040039400391116002110910101600001000000100223123162112340036406160000104004040040400404004040040
16002440039300000004625160010101600001016000050128000031040020400394003919996320019160010201600002032000040039400391116002110910101600001000060100223115162114340036206160000104004040040400404004040040
16002440039300000004625160010101600001016000050128000031040020400394003919996320019160010201600002032000040039400391116002110910101600001000000100223216162114340036406160000104004040040400404004040040