Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UQRSHRN2 (8H)

Test 1: uops

Code:

  uqrshrn2 v0.16b, v1.8h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e1f3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372300612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
100430372200612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
100430372300612548251000100010003983131301830373037241532895100010002000303730371110011000673116112630100030383038303830383038
100430372200612548251000100010003983131301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
100430372200612548251000100010003983131301830373037241532895100010002000303730371110011000673116112630100030383038303830383038
100430372300612548251000100010003983131301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
1004303722001032548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
100430372360612548251000100010003983131301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
100430372200612548251000100010003983131301830373037241532895100010002000303730371110011000073116112630100030383038303830383038
1004303723120612548251000100010003983130301830373037241532895100010002000303730371110011000073116112630100030383038303830383038

Test 2: Latency 1->1

Code:

  uqrshrn2 v0.16b, v1.8h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03081e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100046071021622296340100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010025285371021622296340100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000371021622296340100001003003830038300383003830038
102043022922500612953725101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000671021622296340100001003003830038300383003830038
102043003722400612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
1020430037225006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007871021622296340100001003003830038300383003830038
102043003722500612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043023222510612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000371021622296341100001003003830038300383003830038
1020430037225006129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100009071021622296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b181e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037278000006129548251001010100001010000504277313030018300373003728287328767100102010000202000030037300371110021109101010000100126402162229630010000103003830038300383003830038
100243003727800000842954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010066402162229630010000103003830038300383003830038
1002430037280000006129548251001010100001010000504277313030018300373003728287328767100102010000202000030037300371110021109101010000100786402162229630010000103003830038300383003830038
100243003726000000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010036402162229630010000103003830038300383003830038
100243003726000000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010106402162229630010000103003830038300383003830038
10024300372600001201032954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010036402162229630010000103003830038300383003830038
1002430037241000007472954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010106402162229630010000103003830038300383003830038
100243003724100012014529548251001010100001010000504277313130018300373003728287328767100102010000202000030037300371110021109101010000100156402162229630010000103003830038300383003830038
1002430037241000003422954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010066402162229630010000103003830038300383003830038
1002430037241000006962954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010006402162229630010000103003830038300383003830038

Test 3: Latency 1->2

Code:

  uqrshrn2 v0.16b, v0.8h, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0318191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722500000612954725101001001000010010000500427716030018300373003728252628733101002001000020020000300373003711102011009910010010000100131117222242229629100001003003830038300383003830228
10204300372240012019729547251010010010000100100005494277160300183003730037282526287331040621410000200200003003730037111020110099100100100001001110971117222242229629100001003003830038300383003830038
102043003722500001972954725101001001000810010000500427716030018300373003728252628733101002001000020020000300373003711102011009910010010000100001117222242229629100001003003830038300383003830038
102043003722500001972954725101001001000010010000500427716030018300373003728252628733101002001000020020000300373003711102011009910010010000100101117222242229629100001003003830038300383003830038
1020430037225001201972954725101001001000010010000500427851230018300373003728271628741101002001000820020016302273003711102011009910010010000100001117170160029645100001003003830038300383003830038
102043003722500000612954725101001001000010010000500427716030018300373003728271628741101002001000820020016300373003711102011009910010010000100001117170160029646100001003003830038300383003830038
102043003722500000612954725101001001000010010000500427716030018300373003728271728740101002001000820020016300373003711102011009910010010000100001117170160029645100001003003830038300383003830038
102043003722400000612954725101001001000010010000500427716030018300373003728271728741101002001000820020016300373003711102011009910010010000100031117180160029645100001003003830038300383003830038
102043022722500000612954725101001001000010010000500427716030018300373003728271628740101002001000820020016300373003711102011009910010010000100001117170160029645100001003003830038300383003830229
10204300372250091760612954725101001001000010010000500427716030018300373003728271728741101002001000820020016300373003711102011009910010010000100001117180160029646100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0308090b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a7a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250000000061295472510010101000010100005042771601300183003730037282863287671001020100002020000300373003711100211091010100001000000006402162229629010000103003830038300383003830038
1002430037224000000006129547251001010100001010000504277160130018300373003728286328767100102010000202000030037300371110021109101010000100000019806402162229629010000103003830038300383003830038
10024300372250000000061295472510010101000010100005042771600300183003730037282863287671001020100002020000300373003711100211091010100001000000006402162229629010000103003830038300383003830038
100243003722500000000251295472510010101000010100005042771601300183003730037282863287671001020100002020000300373003711100211091010100001000020006402162229629010000103003830038300383003830038
10024300372250000000061295472510010101000010100005042771600300543003730037282863287671001020100002020344300373003711100211091010100001000000006402162229629010000103003830038300383003830038
100243003722500000000612954725100101010000101000050427716013001830037300372828632876710010201000020200003003730037111002110910101000010000008406402162229629010000103003830038300383003830038
100243003722500000000612954725100101010000101000050427716013001830037300372828632876710010201000020200003003730037111002110910101000010000006606402162229629010000103003830038300383003830038
1002430037225000000008229547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000011406402162229629010000103003830038300383003830038
10024300372250000000061295472510010101000010100005042771600300183003730037282863287671001020100002020000300373003711100211091010100001000000006402162229629010000103003830038300383003830038
10024300372250000000061295472510010101000010100005042771600300183003730037282863287861001020100002020000300373003711100211091010100001000000306402162229629010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  uqrshrn2 v0.16b, v8.8h, #3
  movi v1.16b, 0
  uqrshrn2 v1.16b, v8.8h, #3
  movi v2.16b, 0
  uqrshrn2 v2.16b, v8.8h, #3
  movi v3.16b, 0
  uqrshrn2 v3.16b, v8.8h, #3
  movi v4.16b, 0
  uqrshrn2 v4.16b, v8.8h, #3
  movi v5.16b, 0
  uqrshrn2 v5.16b, v8.8h, #3
  movi v6.16b, 0
  uqrshrn2 v6.16b, v8.8h, #3
  movi v7.16b, 0
  uqrshrn2 v7.16b, v8.8h, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)03071e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204200891500111292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000001111011901600200621600001002006620066200662006620066
160204200651500029258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100004931111011911600200621600001002006620066200662006620066
16020420065150060292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000001111011901600200621600001002006620066200662006620066
1602042006515100292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011901600200621600001002006620066200662006620066
1602042006515000292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011901610200621600001002006620066200662006620066
1602042006515000292580327100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001002001111011901602200621600001002006620066200662006620066
16020420065150002925801161008012410080028500640196120045200652006520128012820080346200160056200652006511160201100991001001600001000001111011915700201381600001002006620066200662006620066
1602042006515000292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011901600200621600001002006620066200662006620066
1602042006515000292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011901600200621600001002006620066200662006620066
16020420065150024292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011901600200621600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)031e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9accfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600242009715000452780010108000010800005064000011520032200512005132280010208000020160000200512005111160021109101016000010000010043811192521120820048201160000102005220052200522005220052
160024200601503870452780010108000010800005064000011520032200512005132280010208000020160000200512005111160021109101016000010000010043821192521120820048201160000102005220052200522005220052
1600242005115138104527800101080000108000050640000115200322006020051322800102080000201600002005120051111600211091010160000100000100438211925211202020048201160000102005220052200522005220052
160024200511500045278001010800001080000506400001152003220051200513228001020800002016000020051200511116002110910101600001000001003182193421120920048201160000102005220052200522005220052
1600242005115000512780010108000010800005064000001520032200512005132280010208000020160000200512005111160021109101016000010000010040831192521119920048201160000102005220052200522005220052
160024200511500045278001010800001080000506400001152003220051200513228001020800002016000020051200511116002110910101600001000001003482192521171920048201160000102005220052200522005220052
160024200511502310452780010108000010800005064000011520032200512005132280010208000020160000200512005111160021109101016000010502720100438211925211191920048201160000102005220052200522005220052
160024200511500045278001010800001080000506400001152003220051200513228001020800002016000020051200511116002110910101600001000001003482192521191920048201160000102005220052200522005220061
1600242005115030045278001010800001080000506400001152003220051200513228001020800002016000020051200511116002110910101600001000001003182192521219920048201160000102005220052200522005220052
16002420051150201045278001010800001080000506400001152003220051200513228001020800002016000020051200511116002110910101600001000001003382192521119920048201160000102005220052200522005220052

Test 5: throughput

Count: 16

Code:

  uqrshrn2 v0.16b, v16.8h, #3
  uqrshrn2 v1.16b, v16.8h, #3
  uqrshrn2 v2.16b, v16.8h, #3
  uqrshrn2 v3.16b, v16.8h, #3
  uqrshrn2 v4.16b, v16.8h, #3
  uqrshrn2 v5.16b, v16.8h, #3
  uqrshrn2 v6.16b, v16.8h, #3
  uqrshrn2 v7.16b, v16.8h, #3
  uqrshrn2 v8.16b, v16.8h, #3
  uqrshrn2 v9.16b, v16.8h, #3
  uqrshrn2 v10.16b, v16.8h, #3
  uqrshrn2 v11.16b, v16.8h, #3
  uqrshrn2 v12.16b, v16.8h, #3
  uqrshrn2 v13.16b, v16.8h, #3
  uqrshrn2 v14.16b, v16.8h, #3
  uqrshrn2 v15.16b, v16.8h, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)030b18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8a9acc3c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204400583000002490030251601081001600081001600205001280132040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000001111011801600400361600001004004040040400404004040040
16020440039300000270030251601081001600081001600205001280132040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000001111011801600400361600001004004040040400404004040040
16020440039300000810030251601081001600081001600205001280132040020400394003919977619990160212200160032200320064400394003911160201100991001001600001000000001111011801600400361600001004004040040400404004040040
16020440039300000180030251601081001600081001600205001280132040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000001111011801600400361600001004004040040400404004040040
16020440039300000360030251601081001600081001600205001280132140020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000001111011801600400361600001004004040040400404004040040
16020440039300000690035251601081001600081001600205001280132140020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000301111011801600400361600001004060340600403414059940609
160204406563041121316531144119932481612761001610831001611475001289052140503406544070720098552031216134420416125420232249440764406131311602011009910010016000010022025665011110341117320404091600001004071440771406594070840714
16020440608304113131131114401086251601081001600081001600205001280132140020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000001111011801600400361600001004004040040400404004040040
160204400393000003000302516010810016000810016002050012801320400204003940039199772420018160120200160032200320064400394003911160201100991001001600001000000001111011801600400361600001004004040040400404004040040
160204400392990002670030251602121001600081001600205111280132140020400914009019977619990160230200160032200320064400394003911160201100991001001600001000000301111011801601400361600001004004040103400404004040040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)03070b18191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600244005130000004246251600101016000010160000501280000114002040039400391999632001916001020160000203200004003940039111600211091010160000100100223118162116440036155160000104004040040400404004040040
16002440039300000071146251600101016000010160000501280000114002040039400391999632001916001020160000203200004003940039111600211091010160000100100223116162116540036155160000104004040040400404004040040
1600244003929900007444625160010101600001016000050128000011400204003940039199962020019160010201600002032000040039400391116002110910101600001021002462241642253400363010160000104004040040400404004040040
160024400393000000501462516001010160000101600005012800001140020400394003919996320019160010201600002032028040039400391116002110910101600001001002462241642244400363010160000104004040040400404004040040
160024400393000000723522516001010160000101600005012800000140020400394003919996320019160010201600002032000040039400391116002110910101600001001002462261642254400363010160000104004040040400404004040040
160024400393000000756522516001010160000101600005012800000140020400394003919996320019160010201600002032000040039400391116002110910101600001001002462241642253400363010160000104004040040400404004040040
160024400393000000636522516001010160000101600005012800000140020400394003919996320019160010201600002032000040039400391116002110910101600001001002462241642245400363010160000104004040040400404004040040
16002440039300000050152251600101016000010160000501280000014002040039400391999632012816001020160000203200004003940039111600211091010160000100100223116162114340036155160000104004040040400404004040040
160024400393000000801462516001010160000101600005012800001140020400394003919996320019160010201600002032000040039400391116002110910101600001001002231141621166400361510160000104004040040400404004040040
160024400393000000789462516001010160000101600005012800001140020400394003919996320019160010201600002032000040039400391116002110910101600001001002431141622155400361510160000104004040040400404004040040