Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UQRSHRN (2D)

Test 1: uops

Code:

  uqrshrn v0.2s, v0.2d, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)030b18191e1f3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a6a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10043037230000061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
10043037230000061254725100010001000398160130183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
10043037230000061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
10043037220000061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
10043037230000061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
10043037230000061254725100010001000398160130183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
10043037230000061254725100010001000398160030183037303724143289510001000100030373037111001100000073116102629100030383038303830383038
10043037220000061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
10043037230000061254725100010001000398160030183037303724143289510001000100030373037111001100000073116112629100030383038303830383038
10043037230000061254725100010001000398160130183037303724143289510001000100030373037111001100000073116112629100030383038303830383038

Test 2: Latency 1->2

Code:

  uqrshrn v0.2s, v0.2d, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03090b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa7a8a9acc2c5cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372250000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010001000071011611296330100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160030018030037300372828732874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038
10204300372240000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038
10204300372250000006129547251010010010000100100005004277160130018030037300372826432874510100200100002001000030037300371110201100991001001000010000000071011611296330100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cficache miss (d3)d5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250000061295472510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000064002162229629010000103003830038300383003830038
10024300372250000061295472510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000064002162229629010000103003830038300383003830038
10024300372240000061295472510010101000010100005042771600300183003730037282863287671001022100002010000300373003711100211091010100001000000000064002162229629010000103003830038300383003830038
10024300372250000061295472510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000064002162229629010000103003830038300383003830038
10024300372250000061295472510010101000010100005042771600300183007030037282863287671001020100002010000300373003711100211091010100001000000000064002162229629010000103003830038300713003830038
10024300372250000061295472510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000064002162229629010000103003830038300383003830038
10024300372250000061295472510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000300064002162229629010000103003830038300383003830038
10024300372250000061295472510010101000010100005042785120300183003730037282863287671001020100002010000300373003711100211091010100001000000000064002162229629010000103003830038300383003830038
100243003722400000612954725100101010000101000050427716013001830037300372828632876710010201000020100003003730037111002110910101000010000009900064002162229701010000103003830038300383003830038
10024300372250000084294841721007615100561411200704287976130090304503041828312332891911214201131122113173041530403911002110910101000010002022492800081002893429979110000103046430464304163041730417

Test 3: throughput

Count: 8

Code:

  uqrshrn v0.2s, v8.2d, #3
  uqrshrn v1.2s, v8.2d, #3
  uqrshrn v2.2s, v8.2d, #3
  uqrshrn v3.2s, v8.2d, #3
  uqrshrn v4.2s, v8.2d, #3
  uqrshrn v5.2s, v8.2d, #3
  uqrshrn v6.2s, v8.2d, #3
  uqrshrn v7.2s, v8.2d, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)0318191e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd6inst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200581500003025801081008000810080020500641040120020200392003999776999080120200800322008003220089200391180201100991001008000010010111511816020036800001002004020040200402004020040
80204200391500003025801081008000810080020500640132120020200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200402004020040
80204200391500003025801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200902004020040
802042003915000123025801081008000810080020500640132120020200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200402004020040
80204200391500003025801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200402004020040
80204200391500003025801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200402004020040
80204200391500003025801081008000810080020500640132020070200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200402004020040
80204200391500003025801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200402004020040
80204200391500003025801081008000810080020500640132020020200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200402004020040
80204200391500003025801081008000810080020500640132120020200392003999776999080120200800322008003220039200391180201100991001008000010000111511816020036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)0307080b18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2branch mispredict (cb)cfd0d2icache miss (d3)d5d6dadbddinst fetch restart (de)e0? int output thing (e9)ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242003915000000000402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200003160044200360080000102004020040200402004020040
800242003915000000000402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200002160042200360080000102004020040200402004020040
800242003915000000000402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200002160044200360080000102004020040200402004020040
80024200391500000026700402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200002160044200360080000102004020040200402004020040
800242003915000000241760402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200002160024200360080000102004020040200402004020040
800242003915000000000402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200002160042200360080000102004020040200402004020040
800242003915000000000402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200004160044200360080000102004020040200402004020040
800242003915000000000402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200003160024200360080000102004020040200402004020040
800242003915000000000402580010108000010800005064000002002020039200399996310019800102080000208000020039200391180021109101080000100000000050200002160024200360080000102004020040200402004020040
800242003915000000000402580010108000010800005064000012002020039200399996310019800102080000208000020039200391180021109101080000100000000050200004160044200360080000102004020040200402004020040