Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UQXTN2 (8H)

Test 1: uops

Code:

  uqxtn2 v0.16b, v1.8h
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03181e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372300612548251000100010003983133018303730372415328951000100020003037303711100110000373216332630100030383038303830383038
100430372300612548251000100010003983133018303730372415328951000100020003037303711100110000073216222630100030383038303830383038
100430372200612548251000100010003983133018303730372415328951000100020003037303711100110001373216222630100030383038303830383038
1004303723006125482510001000100039831330183037303724153289510001000200030373037111001100060073216222630100030383038303830383038
1004303723001012548251000100010003983133018303730372415328951000100020003037303711100110000073216222630100030383038303830383038
100430372300822548251000100011493983133018303730372415328951000100020003037303711100110000073216222630100030383038303830383038
1004303723006125482510001000100039831330183037303724153289510001000200030373037111001100052073216222630100030383038303830383038
100430372300612548251000100010003983133018303730372415328951000100020003037303711100110000073216222630100030383038303830383038
100430372200822548251000100010003983133018303730372415328951000100020003037303711100110000073216222630100030383038303830383038
100430372300612548251000100010003983133018303730372415328951000100020003037303711100110000073216222630100030383038303830383038

Test 2: Latency 1->1

Code:

  uqxtn2 v0.16b, v1.8h
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9facc5cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003722406129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100017102161229634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007101161129634100001003003830038300383003830038
10204300372250612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010017707101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007101161129634100001003003830038300383003830038
102043003722506129548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100007101161129634100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0304090b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500000000822954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402163229630010000103003830038300383003830038
1002430037225000000002542954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402163229630010000103003830038300383003830038
100243003722500000000612954825100101010000101000050427731303001830083300372828732876710010201000020200003003730037111002110910101000010000000006402164229630010000103003830038300383003830038
100243003722500000000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722400000000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630110000103003830038300383003830038
1002430037225000000007329548251001010100001010000504277313030018300373003728287262876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722500000000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722400000000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722500000000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038
100243003722500000000612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010000000006402162229630010000103003830038300383003830038

Test 3: Latency 1->2

Code:

  uqxtn2 v0.16b, v0.8h
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225006129547251010010010000100100005004277160130018300373003728271728740101002001000020020000300373003711102011009910010010000100000011171701600296450100001003003830038300383003830038
1020430037225006129547251010010010000100100005004277160130018300373003728271628741101002001000820020016300373003711102011009910010010000100000011171801600296460100001003003830038300383003830038
1020430037225006129547251010010010000100100005004277160130018300373003728271628741101002001000820020016300373003711102011009910010010000100000011171701600296460100001003003830038300383003830038
1020430037225006129547251010010010000100100005004277160130018300373003728271628740101002001000820020016300373003711102011009910010010000100000011171801600296450100001003003830038300383003830038
10204300372250083329547251010010010000100100005004277160130018300373003728271628741101002001000820020016300373003711102011009910010010000100000011171701600296450100001003003830038300383003830038
1020430037225006129547251010010010000100100005004277160130018300373003728271728740101002001000820020016300373003711102011009910010010000100003011171701600296460100001003003830038300383003830038
1020430037225006129547251010010010000100100005004277160130018300373003728271628741101002001000820020016300373003711102011009910010010000100000011171701600296450100001003003830038300383003830038
1020430037225006129547251010010010000100100005004277160130018300373003728271628740101002001000020020000300373003711102011009910010010000100000011172222422296290100001003003830038300383003830038
10204300372252106129547251010010010000100100005004277160130018300373003728271628740101002001000820020016300373003711102011009910010010000100000011171701600296460100001003003830038300383003830038
1020430037225006129547251010010010000100100005004277160130018300373003728271728741101002001000820020016300373003711102011009910010010000100000011171801600296450100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0308183f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037225006129547251001010100001010000504277160300180300373003728286328767100102010000202000030037300371110021109101010000100006402162229629010000103003830038300383003830038
1002430037225006129547251001010100001010000504277160300180300373003728286328767100102010000202000030037300371110021109101010000100006402162229629010000103003830038300383003830038
1002430037225006129547251001010100001010000504277160300180300373003728286328767100102010000202000030037300371110021109101010000100006402162229629010000103003830038300383013330038
1002430037225006129547251001010100001010000504277160300180300373003728286328767100102010000202000030037300371110021109101010000100006402162229629010000103003830038300383003830038
100243003722500113329547251001010100001010000504277160300180300373003728286328767100102010000202066230037300371110021109101010000100006402162229629110000103003830038300383003830038
1002430037225126129547251001010100001010000504277160300180300373003728286328767100102010000202000030037300371110021109101010000100006402162229629010000103003830038300383003830038
1002430037225006129547251001010100001010000504277160300180300373003728286328767100102010000202000030037300371110021109101010000100006402162229629010000103003830038300383003830038
1002430037225006129547251001010100001010000504277160300180300373003728286328767100102010000202000030037300371110021109101010000100006402162229629010000103008630085300383003830038
1002430037225006129547251001010100001010000504277160300183300373003728286328767100102010000202000030037300371110021109101010000100106402162229629010000103003830038300383003830038
1002430037225006129547251001010100001010000504277160300180300373003728286328767100102010000202000030037300371110021109101010000100006402162229629010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  uqxtn2 v0.16b, v8.8h
  movi v1.16b, 0
  uqxtn2 v1.16b, v8.8h
  movi v2.16b, 0
  uqxtn2 v2.16b, v8.8h
  movi v3.16b, 0
  uqxtn2 v3.16b, v8.8h
  movi v4.16b, 0
  uqxtn2 v4.16b, v8.8h
  movi v5.16b, 0
  uqxtn2 v5.16b, v8.8h
  movi v6.16b, 0
  uqxtn2 v6.16b, v8.8h
  movi v7.16b, 0
  uqxtn2 v7.16b, v8.8h
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9facc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602042009015002925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901601200621600001002006620066200662006620066
1602042006515002925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066
16020420065150068225801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066
16020420065150021925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066
1602042006515102925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066
1602042006515002925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066
1602042006515102925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066
1602042006515002925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066
1602042006515002925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066
16020420065150015725801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010001111011901600200621600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)033f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fcfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002420064150452580010108000010800005064000011020027200462004632280010208000020160000200462004611160021109101016000010100263128320422232004730160000102005120051200512005120051
160024200501505125800101080000108000050640000015200312004620050322800102080000201600002005020050111600211091010160000101002911528324422322004730160000102005120051200512005120051
160024200501505125800101080000108000050640000015200312005020050322800102080000201600002005020050111600211091010160000101002911527320212332004315160000102004720047200472004720047
160024200461504525800101080000108000050640000115200272004620046322800102080000201600002005020050111600211091010160000101002911523324422332004730160000102005120051200512005120051
160024200501505125800101080000108000050640000015200312005020050322800102080000201600002005020050111600211091010160000101002911520424422332004730160000102005120051200512005120051
16002420050150512580010108000010800005064000001520078200502005032280010208000020160000200462004611160021109101016000010100263121324422232004730160000102005120051200512005120051
1600242005015075125800101080000108000050640000015200312005020050322800102080000201600002005020050111600211091010160000101002911521324422232004730160000102005120051200512005120051
1600242005015076025800101080000108000050640000015200312005020050322800102080000201600002005020050111600211091010160000101002911520324422332004730160000102005120051200512005120051
160024200501505125800101080000108000050640000015200312005020050322800102080000201602662005020050111600211091010160000101002911521324422322004730160000102005120051200512005120051
160024200501505125800101080000108000050640000015200312005020050322800102080000201600002005020050111600211091010160000101002911520324422332004730160000102005120051200512005120051

Test 5: throughput

Count: 16

Code:

  uqxtn2 v0.16b, v16.8h
  uqxtn2 v1.16b, v16.8h
  uqxtn2 v2.16b, v16.8h
  uqxtn2 v3.16b, v16.8h
  uqxtn2 v4.16b, v16.8h
  uqxtn2 v5.16b, v16.8h
  uqxtn2 v6.16b, v16.8h
  uqxtn2 v7.16b, v16.8h
  uqxtn2 v8.16b, v16.8h
  uqxtn2 v9.16b, v16.8h
  uqxtn2 v10.16b, v16.8h
  uqxtn2 v11.16b, v16.8h
  uqxtn2 v12.16b, v16.8h
  uqxtn2 v13.16b, v16.8h
  uqxtn2 v14.16b, v16.8h
  uqxtn2 v15.16b, v16.8h
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2503

retire (01)cycle (02)03080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440058300000000302516010810016000810016002050012801321040020040039400391997761999016012020016003220032006440039400391116020110099100100160000100000011110118016004003601600001004004040040400404004040040
16020440039300000000302516010810016000810016002050012801320040020040039400391997761999016012020016003220032006440039400391116020110099100100160000100000011110118016004003601600001004004040040400404004040040
16020440039300000000302516010810016000810016002050012801320040020340039400391997761999016012020016003220032006440039400391116020110099100100160000100000011110118016004003601600001004004040040400404004040040
16020440039300000000302516010810016000810016002050012801320040020040039400391997761999016012020016003220032006440039400391116020110099100100160000100000011110118016004003601600001004004040040400404004040040
16020440039300000000302516010810016000810016002050012801320040020040039400391997761999016012020016003220032006440039400391116020110099100100160000100000011110118016024003601600001004004040040400404004040040
160204400393000000005052516010810016000810016002050012801320040020040039400391997761999016012020016003220032006440039400391116020110099100100160000100000011110118016004003601600001004004040040400404004040040
160204400393000000001252516010810016000810016002050012801320040020040039400391997761999016012020016003220032006440039400391116020110099100100160000100000011110118016004003601600001004004040040400404004040040
16020440039299000000302516010810016000810016002050012801320040020040039400391997761999016012020016003220032006440099400391116020110099100100160000100000011110118016004003601600001004004040040400404004040040
16020440039300000000302516010810016000810016002050012801320040020040039400391997761999016012020016003220032006440039400391116020110099100100160000100000011110118016004003601600001004004040040400404004040040
160204400393000000003025160108100160008100160020500128013200400200400394003919977619990160120200160032200320064400394003911160201100991001001600001000104268111102842127134046011600001004015140567405644055940501

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0307080b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8accfd0d2icache miss (d3)itlb miss (d4)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600244003930000000002382516001010160000101600005012800001154002040039400391999632001916001020160000203200004003940039111600211091010160000100000010022831010162114240036206160000104004040040400404004040040
160024400393000000000462516001010160000101600005012800001154002040039400391999632001916001020160000203200004003940039111600211091010160000100000010022113102162116640036206160000104004040040400404004040040
160024400393000000001324625160010101600001016000050128000011540020400394003919996320019160010201600002032000040089400391116002110910101600001000000100241142041622242400364012160000104004040040400404004040040
1600244003930000000003312516001010160000101600005012800000154002040039400391999632001916001020160000203200004003940039111600211091010160000100000010024112104164222440036206160000104004040040400404004040040
160024400393000000000522516001010160000101600005012800001154002040039400391999632001916001020160000203200004003940039111600211091010160000100000010024114204164124440036406160000104004040040400404004040040
1600244003930000000004625160010101600001016000050128000001540020400394003919996320019160010201600002032000040039400391116002110910101600001000000100241132041642224400364012160000104004040040400404004040040
16002440039299000003005225160010101600001016000050128000001540020400394003919996320019160010201600002032000040039400391116002110910101600001000000100241142021642224400364012160000104004040040400404004040040
16002440039299000000052251600101016000010160000501280000015400204003940039199963200191600102016000020320000400394003911160021109101016000010000001002484104164214240036206160000104004040040400404004040040
16002440039299000000073225160010101600001016000050128000001540020400394003919996320019160010201600002032000040039400391116002110910101600001000000100241132041641242400364012160000104004040040400404004040040
160024400393000000012052251600101016000010160000501280000015400204003940039199963200191600102016000020320000400394003921160021109101016000010000001002284204162122440036406160000104004040040400404004040040