Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

URSHR (vector, 8H)

Test 1: uops

Code:

  urshr v0.8h, v0.8h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372306125472510001000100039816013018303730372414328951000100010003037303711100110000073116112629100030383038303830383038
100430372206125472510001000100039816013018303730372414328951000100010003037303711100110001073116112629100030383038303830383038
100430372206125472510001000100039816013018303730372414328951000100010003037303711100110000073116112629100030383038303830383038
100430372206125472510001000100039816013018303730372414328951000100010003037303711100110000073116112629100030383038303830383038
100430372306125472510001000100039816013018303730372414328951000100010003037303711100110000073116112629100030383038303830383038
100430372206125472510001000100039816013018303730372414328951000100010003037303711100110000073116112629100030383038303830383038
100430372206125472510001000100039816013018303730372414328951000100010003037303711100110000073116112629100030383038303830383038
100430372206125472510001000100039816013018303730372414328951000100010003037303711100110000073116112629100030383038303830383038
1004303723061254725100010001000398160130183037303724143289510001000100030373037111001100001873116112629100030383038303830383038
100430372306125472510001000100039816013018303730372414328951000100010003037303711100110000073116112629100030383038303830383038

Test 2: Latency 1->2

Code:

  urshr v0.8h, v0.8h, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030b181e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225100061295472510100104100001241000050042785123001830037301332826432876110100200101672001016730277300371110201100991001001000010000012071013311296330100001003003830038300383003830038
102043003722510423010329547251010010010000100100005004277160300183003730037282643287451010020010000200100003003730037111020110099100100100001000000071011611296330100001003003830038300383003830038
102043003722500360612954725101001001000010010000500427716030018300373003728264328745101002001000020010000300373003711102011009910010010000100000109071011611296330100001003003830038301313013330038
10204300842261121601432295472510112100100001001000050042771603001830037300372826421287451010020010000200100003003730037111020110099100100100001000020071011611296330100001003003830038300383003830038
1020430037225007506129547251010010010000100100005004277160300183003730037282643287451010020010000200100003003730037111020110099100100100001000100271011611296330100001003003830038300383003830038
1020430037225002406129547251010010010000100100005004277160300183003730037282643287451010020010000200100003003730037111020110099100100100001000000071011611296330100001003003830038300383003830038
10204300372240066010329547251010010010000100100005004277160300183003730037282643287451010020010000200100003003730037111020110099100100100001000000071011611296330100001003003830038300383003830038
1020430037225002706129547251010010010000100100005004277160300183003730037282643287451010020010000200100003003730037111020110099100100100001000000071011611296330100001003003830038300383003830038
102043003722500477016629547251010010010000100100005004277160300183003730037282643287451010020010000200100003003730037411020110099100100100001000000071011611296330100001003003830038300383003830038
1020430037225001506129547251010010010000100100005004277160300183003730037282643287451010020010000200100003003730037111020110099100100100001000000071011611296330100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3a3f4e5051inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500000006129547300212510010101000010100005042771601300183003730037282863287671001020100002010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038
1002430037225000044100612954702510010101000010100005042771601300183003730037282863287671001020100002010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038
1002430037225000054300612954702510010101000010100005042771600300183003730037282863287671001020101632010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038
100243003722500000002512954702510010101000010100005042771601300183003730037282863287671001020100002010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038
100243003722500000005362954702510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038
10024300372250000000612954702510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038
1002430037225000000061295470251001010100001010000504277160030018300373003728286328767100102010000201000030037300371110021109101010000100000013500006403163329629010000103003830038300383003830038
10024300372250000000612954702510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038
1002430037225000031200612954702510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038
1002430037225000037200842954702510010101000010100005042771600300183003730037282863287671001020100002010000300373003711100211091010100001000000000006403163329629010000103003830038300383003830038

Test 3: throughput

Count: 8

Code:

  urshr v0.8h, v8.8h, #3
  urshr v1.8h, v8.8h, #3
  urshr v2.8h, v8.8h, #3
  urshr v3.8h, v8.8h, #3
  urshr v4.8h, v8.8h, #3
  urshr v5.8h, v8.8h, #3
  urshr v6.8h, v8.8h, #3
  urshr v7.8h, v8.8h, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042003915033302580108100800081008002050064013202002020039200399977699908054020080032200800322003920039118020110099100100800001000011151180160020036800001002004020105200402004020040
80204200391500302580108100800081008002050064013202002020039200399977699908012020080032200800322003920039118020110099100100800001000011151180160020036800001002004020040200402004020040
8020420039150030258010810080008100800205006401320200202003920039997769990801202008003220080032200392003911802011009910010080000100047511151180160020078800001002004020040200402004020040
80204200901500304480212100800081008002050064013202002020039200399977699908012020080032200801382003920039118020110099100100800001000011151180160020075800001002004020040200402004020040
802042003915033025801081008000810080020500640132020020200392003999776100148012020080032200800322003920039118020110099100100800001000011151180160020036800001002004020040200402004020040
80204200391500302580108100800081008002050064013202002020039200399977699908012020080032200800322003920039118020110099100100800001000011151180160020036800001002004020040200402004020040
8020420039150231302580108100800081008002050064013202002020039200399977699908012020080032200800322003920039118020110099100100800001001011151180160020036800001002004020040200402004020040
80204200391500302580108100800081008002050064013202002020039200399977699908012020080032200800322003920039118020110099100100800001000011151180160020036800001002004020040200402004020040
80204200391500302580108100800081008002050064013202002020039200399977699908012020080032200800322003920039118020110099100100800001000011151180160020036800001002004020040200402004020040
80204200391500302580108100800081008002050064013202002020039200399977699908012020080032200800322003920039118020110099100100800001000011151180160020036800001002004020040200402004020040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03080a18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80024200511500000000402580010108000010800005064000002002020039200399996031001980010208000020800002003920039118002110910108000010000050201816852003680000102004020040200402004020040
80024200391500000000402580010108000010800005064000002002020039200399996031004480010208000020800002003920039118002110910108000010000050208161182003680000102004020040200402004020040
8002420039150000000040258001010800001080000506400001200202003920039999603100198001020800002080000200392003911800211091010800001000005020716752003680000102004020040200402004020040
80024200391500000000402580010108000010800005064000012002020039200399996031001980010208000020800002003920039118002110910108000010000050209167102003680000102004020040200402004020040
8002420039150000000040258001010800001080000506400001200202003920039999603100198001020800002080000200922003911800211091010800001000005020416682003680000102004020040200402004020040
8002420039150000000040258001010800001080000506400001200202003920039999603100198001020800002080000200392003911800211091010800001000005020716952003680000102004020040200402004020040
8002420039150000000040258001010800001080000506400000200202003920039999603100198001020800002080000200392003911800211091010800001000005020716862003680000102004020040200402004020040
8002420039150000000040258001010800001080000506400000200202003920039999603100198001020800002080000200392008911800211091010800001000005020816792003680000102004020040200402004020040
80024200391500000000402580010108000010800005064000012002020039200399996031001980010208000020800002003920039118002110910108000010000050206166112003680000102004020040200402004020040
80024200391500000000402580010108000010800005064000012002020039200391000603100198001020800002080000200392003911800211091010800001000005020716682003680000102004020040200402004020040