Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

URSRA (vector, 4S)

Test 1: uops

Code:

  ursra v0.4s, v1.4s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03081e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004303723006125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303723006125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303722006125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303722006125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303723006125482510001000100039831313018303730372415328951000100020003037303711100110000284073116112630100030383038303830383038
1004303723006125482510001000100039831313018303730372415328951000100020003037303711100110000673116112630100030383038303830383038
1004303723006125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303723006125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303723006125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303723006125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038

Test 2: Latency 1->1

Code:

  ursra v0.4s, v1.4s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030b1e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
102043003722500060982954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
1020430037224060612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
1020430037225000612954825101001001000010010000500427731313001830037300372826532874510269200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
1020430037225000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
1020430037225000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
102043003722500056752954825101001001000010010000500427731313001830037300842826532874510100200100002002000030037300371110201100991001001000010070283371011611296340100001003003830038300383003830038
10204300372250540612954825101001001000011910000528427815713005430037300372827282874510100200100002002000030037300371110201100991001001000010000371011611296340100001003003830038300383003830038
102043003722510108612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038
1020430037224000612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071011611296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372250178295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322967510000103003830038300383003830038
1002430037225061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322963010000103003830038300383003830038
1002430037225066295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216222963010000103003830038300383003830038
1002430037225061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000640216322963010000103003830038300383003830038

Test 3: Latency 1->2

Code:

  ursra v0.4s, v0.4s, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd6e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037225961295472510100100100001001000050042771601300180300373003728271628740101002001000820020000300373003711102011009910010010000100001117171629646100001003003830038300383003830038
1020430037225061295472510100100100001001000050042771601300180300373003728271728740101002001000820020016300373003711102011009910010010000100091117181629645100001003003830038300383003830038
1020430037225061295472510100100100001001000050042771601300180300373003728271728741101002001000820020016300373003711102011009910010010000100001117171629645100001003003830038300383003830038
1020430037225061295472510100100100001001000050042771600300180300373003728271728740101002001000820020016300373003711102011009910010010000100001117171629646100001003003830085300383003830038
1020430037225061295472510100100100001001000050042771601300180300373003728271628741101002001000820020016300373003711102011009910010010000100001117181629645100001003003830038300383003830038
1020430037225061295472510100100100001001000050042771601300180300373003728271628741101002001000820020344300373003711102011009910010010000100001117171629646100001003003830038300383003830038
1020430037225061295472510100100100001001000050042771601300180300373003728271628740101002001000820020016300373003711102011009910010010000100001117171629645100001003003830038300383003830038
1020430037224061295472510100100100001001000050042771601300180300373003728271628741101002001000820020016300373003711102011009910010010000100001117181629645100001003003830038300383003830038
1020430037225061295472510100100100001001000050042771600300180300373003728271728740101002001000820020016300373003711102011009910010010000100001117401629645100001003003830038300383003830038
1020430037225061295472510100100100001001000050042771600300180300373003728271728741101002001000820020016300373003711102011009910010010000100001117171629646100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a7a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003722500000025129547251001010100001010000504277160130018300813003728286328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
10024300372250000006129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
10024300372240000006129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000006403242229629010000103003830038300383003830038
10024300372250000006129547251001010100001010000504277160130018300373003728286328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
10024300372250000006129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
10024300372250000006129547251001010100001010000504277160130018300373003728286328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
10024300372250000006129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
10024300372250000006129547251001010100001010000504277160130018300373003728286328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
10024300372250000006129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038
10024300372240000006129547251001010100001010000504277160130018300373003728290328767100102010000202000030037300371110021109101010000100000006402162229629010000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  ursra v0.4s, v8.4s, #3
  movi v1.16b, 0
  ursra v1.4s, v8.4s, #3
  movi v2.16b, 0
  ursra v2.4s, v8.4s, #3
  movi v3.16b, 0
  ursra v3.4s, v8.4s, #3
  movi v4.16b, 0
  ursra v4.4s, v8.4s, #3
  movi v5.16b, 0
  ursra v5.4s, v8.4s, #3
  movi v6.16b, 0
  ursra v6.4s, v8.4s, #3
  movi v7.16b, 0
  ursra v7.4s, v8.4s, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)030b181e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602042009115000029258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
1602042006515000029258011610080016100800285006401961200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
1602042006515100029258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
1602042006515000029258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
1602042006515000050258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
1602042006515000092258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
16020420065150000113258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
1602042006515000029258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
16020420065150000219258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066
1602042006515100029258011610080016100800285006401960200452006520065612801282008002820016005620065200651116020110099100100160000100001111011911611200621600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)03081e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd0d2icache miss (d3)itlb miss (d4)d5d6d9dadbddinst fetch restart (de)e0ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160024200591500045258001010800001080000506400001120027200462004632280010208000020160000200462004611160021109101016000010001002635150520211442004315160000102004720047200472004720047
160024200461500045258001010800001080000506400001120027200462004632280010208000020160000200462004611160021109101016000010001002535030420211242004330160000102004720047200472004720047
160024200461500045258001010800001080000506400001120027200462004632280010208000020160000200462005411160021109101016000010001002735250420211342004315160000102004720047200472004720047
160024200461500045258001010800001080000506400001120027200462004632280010208000020160000200462004611160021109101016000010001002735250420211442004315160000102005120047200472004720047
160024200461500093258001010800001080000506400001120027200462010532280010208000020160000200462004611160021109101016000010101003035330420211252004315160000102005120047200472004720047
1600242004615010235258001010800001080000506400001120027200462004632280010208000020160000200462004611160021109101016000010001002765030420211432004715160000102004720047200472004720047
160024200461500045258001010800001080000506400001120027200462004632280010208000020160000200462004611160021109101016000010001002634750420211432004315160000102004720047200472005120047
160024200461500045258001010800001080000506400001120031200462005032280010208000020160000200462004611160021109101016000010001002834530324211452004315160000102004720047200472004720047
160024200461500045258001010800001080000506400001120027200462004632280010208000020160000200462004611160021109101016000010001002834730520211332004715160000102004720047200472004720047
160024200461500045258001010800001080000506400000120027200462004632280010208000020160000200462004611160021109101016000010001002834930420411332004315160000102004720047200472004720047

Test 5: throughput

Count: 16

Code:

  ursra v0.4s, v16.4s, #3
  ursra v1.4s, v16.4s, #3
  ursra v2.4s, v16.4s, #3
  ursra v3.4s, v16.4s, #3
  ursra v4.4s, v16.4s, #3
  ursra v5.4s, v16.4s, #3
  ursra v6.4s, v16.4s, #3
  ursra v7.4s, v16.4s, #3
  ursra v8.4s, v16.4s, #3
  ursra v9.4s, v16.4s, #3
  ursra v10.4s, v16.4s, #3
  ursra v11.4s, v16.4s, #3
  ursra v12.4s, v16.4s, #3
  ursra v13.4s, v16.4s, #3
  ursra v14.4s, v16.4s, #3
  ursra v15.4s, v16.4s, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2503

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8c2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204400493000302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801600400361600001004004040040400404004040040
160204400393000302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801601400361600001004004040040400404004040040
160204400392990302516010810016000810016002050012801324002040039402991997761999016012020016034020032006440039400921116020110099100100160000100001111011801600400361600001004004040040400404004040040
160204400393000302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801600400361600001004004040040400404004040040
160204400392990302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801600400361600001004004040040400404004040040
160204400393000302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801600400361600001004004040040400404004040040
160204400393000302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801600400361600001004004040040400404004040040
160204400392990302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801600400361600001004004040040400404004040040
160204400393000302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801600400361600001004004040040400404004040040
160204400393000302516010810016000810016002050012801324002040039400391997761999016012020016003220032006440039400391116020110099100100160000100001111011801600400361600001004004040040400404004040040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)030b18191e3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8acc2cdcfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002440051300000004625160010101600001016000050128000011400204003940039199960320019160010201600002032000040039400391116002110910101600001000000100223543101621191240036206160000104004040040400404004040040
160024400393000000046251600101016000010160000501280000114002040039400391999603200191600102016000020320000402424003911160022109101016000010001200100223533131621113840036206160000104004040040400404004040040
16002440039300000004625160010101600001016000050128000011400204003940039199960320019160010201600002032000040039400391116002110910101600001000000100223513131621191240036206160000104004040040400404004040040
1600244003930000000217251600101016000010160000501280000114002040039400391999603200191600102016000020320000400394003911160021109101016000010000001002235031816211121340036206160000104004040040400404004040040
16002440039300000004625160010101600001016000050128000011400204003940039199960320019160010201600002032000040039400391116002110910101600001000000100223463131621114940036206160000104004040040400404004040040
16002440039300000004625160010101600001016000050128000011400204003940039199960320019160010201600002032000040039400391116002110910101600001000000100223493131621112840036206160000104004040040400404004040040
16002440039300000004625160010101600001016000050128000011400204003940039199960320019160010201600002032000040243400391116002110910101600001000000100223483101621181240036206160000104004040040400404004040040
16002440039300000004625160010101600001016000050128000011400204003940039199960320019160010201600002032000040039400391116002110910101600001000000100223543101621114940036206160000104004040040400404004040040
160024400393000000046251600101016000010160000501280000114002040039400391999603200191600102016000020320000400394003911160021109101016000010000001002235231716211121440036206160000104004040040400404004040040
1600244003930000000462516001010160000101600005012800001140020400394003919996032001916001020160000203200004003940039111600211091010160000100000010022352381621191240036206160000104004040040400404004040040