Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

USHLL2 (2D)

Test 1: uops

Code:

  ushll2 v0.2d, v0.4s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03191e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8a9acc2cficache miss (d3)d5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004203716006116862510001000100026452102018203720371571318951000100010002037203711100110000000730216111786100020382038203820382038
1004203715006116862510001000100026452102018203720371571318951000100010002037203711100110000000730116111786100020382038203820382038
1004203715008416862510001000100026452102018203720371571318951000100010002037203711100110000000730116111786100020382038203820382038
100420371600180168625100010001000264521020182037203715713189510001000100020372037111001100013000730116111786100020382038203820382038
10042037160126116862510001000100026452102018203720371571318951000100010002037203711100110000000730116111786100020382038203820382038
10042037160061168625100010001000264521020182037203715713189510001000100020372037111001100040030730116111786100020382038203820382038
1004203715006116862510001000100026452102018203720371571318951000106410002037203711100110000000730116111786100020382038203820382038
1004203716006116862510001000100026452102018203720371571318951000100010002037203711100110000030730116111786100020382038203820382038
1004203715006116862510001000100026452102018203720371571318951000100010002037203711100110000000730116111786100020382038203820382038
100420371500439168625100010001000264521020182037203715713189510001000100020372037111001100033000730116111786100020382038203820382038

Test 2: Latency 1->2

Code:

  ushll2 v0.2d, v0.4s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)030a0b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204200371550000000841968625101001001000010010000500284752112001820037200371842131874510100200100002001000020037200371110201100991001001000010000000017101161119791100001002003820038200382003820038
10204200371550000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038
10204200371550000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038
10204200371550000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038
10204200371560000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038
10204200371550000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038
10204200371560000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038
10204200371550000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038
10204200371550000000751968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038
10204200371550000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000000007101161119791100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03080a0b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371550000000310719686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100000000006403164519786010000102003820038200382003820038
100242003715600000006119686251001010100001010000502847521020018200372018018443318767100102010000201000020037200371110021109101010000100000000006404163419822010000102003820038200382003820038
100242003715600000008419686251001010100001010000502847521020018200372003718443318767100102010000201000020037200373110021109101010000100000100006404164419786010000102003820038200382003820038
1002420037155000000036019686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100000000006404164419786010000102003820038200382003820038
10024200371550000000104119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200844110021109101010000100000000006403163419786010000102003820038200382003820038
1002420037155000000012419686251001010100001010000502847521020018200372003718443318767100102210000201000020037200371110021109101010000100000000006404164419786010000102003820038200382003820038
1002420037155000000020819686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100000000006404164519786110000102003820038200842008520038
1002420037155000000044919686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100000003006404164519786010000102003820038200382003820038
100242003715600000008419686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100000000006404164419786010000102003820038200382003820038
100242003715500000006119686251001010100001010000502847521020018200372003718443318767100102010000201000020037200371110021109101010000100000000006404164319786010000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  ushll2 v0.2d, v8.4s, #3
  ushll2 v1.2d, v8.4s, #3
  ushll2 v2.2d, v8.4s, #3
  ushll2 v3.2d, v8.4s, #3
  ushll2 v4.2d, v8.4s, #3
  ushll2 v5.2d, v8.4s, #3
  ushll2 v6.2d, v8.4s, #3
  ushll2 v7.2d, v8.4s, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03070a1e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200381550002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000011151180160020035800001002003920039200392003920039
80204200381560092925801081008000810080020500640132120019200382003899776998980120200800322008003220038200381180201100991001008000010000011151180160120035800001002003920039200392003920039
80204200381610002925801081008000810080020500640132120019200382003899866998980120200800322008003220038200381180201100991001008000010000011151180160020035800001002003920039200392003920039
80204200381550002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000011151184160020035800001002003920039200392003920039
802042003815500122925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000011151204164020035800001002003920039200392003920039
80204200381550002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000011151180160020035800001002003920039200392003920039
80204200381561002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000011151180160020035800001002003920039200392003920039
80204200381551002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000011151180164420035800001002003920039200392003920039
80204200381550002925801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000011151180160020035800001002003920039200392003920039
802042003815500013825801081008000810080020500640132020019200382003899776998980120200800322008003220038200381180201100991001008000010000011151180164420035800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa6a8abaccfd2itlb miss (d4)d5d6daddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242003915503925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000005020001160112003580000102003920039200392003920039
800242003815603925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001020035020001160112003580000102003920039200392003920039
8002420038156070425800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001001005020001160112003580000102003920039200392003920039
800242003816154123258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010037065020009160112003580000102003920039200392003920039
8002420038155124925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000005020009160112003580000102003920039200392003920039
800242003815503925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000035020006160112003580000102003920039200392003920039
8002420038155039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010000050200015160112003580000102003920039200392003920039
800242003815603925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000005020008160112003580000102003920039200392003920039
8002420038155039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010000050200010160112003580000102003920039200392003920039
8002420038156039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010000050200011160112003580000102003920039200392003920039