Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

USHLL (2D)

Test 1: uops

Code:

  ushll v0.2d, v0.2s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)030b1e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
10042037150061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037160061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037170089168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
100420371600103168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037150061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037160061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037160061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037150061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037160061168625100010001000264521020182037203715713189510001000100020372037111001100010373116111786100020382038203820382038
10042037150061168625100010001000264521020182037203715713189510001000100020372037111001100000073116111786100020382038203820382038

Test 2: Latency 1->2

Code:

  ushll v0.2d, v0.2s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cdcfd0d2d5d6ddinst fetch restart (de)e0? int output thing (e9)eb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204200371560000006119686251010010010000100100005002847521002001820037200371842806187401010020010008200100082003720037111020110099100100100001000000000011171700016001984200100001002003820038200382003820038
10204200371560000006119686251010010010012100100005002847521002001820037200371842806187411010020010008200100082003720037111020110099100100100001000000000011171700016001980000100001002003820038200382003820038
10204200371560000006119686251010010010000100100005002847521002001820037200371842806187401010020010008200100082003720037111020110099100100100001000000000011171800016001980100100001002003820038200382003820038
10204200371550000008919686251010010010000100100005002847521002001820037200371842806187401010020010008200100082003720037111020110099100100100001000000000011171700016001980100100001002003820038200382003820038
10204200371550000006119686251010010010000100100005002847521002001820037200371842807187411010020010174200100082003720037111020110099100100100001000000000011171800016001986600100001002003820038200382003820038
10204200371550000006119686251010010010000100100005002847521002001820037200371842806187401010020010008200100082003720037111020110099100100100001000000103011171700016001980000100001002003820038200382003820038
10204200371550000006119686251010010010000100100005002847887002001820037200371842807187401010020010008200100082003720037111020110099100100100001000000003011171800016001980100100001002003820038200382003820038
10204200371550000006119686251010010010000100100005002847521002001820037200371842806187401010020010008200100082003720037111020110099100100100001000000000011171700016001980100100001002003820038200382003820038
102042003715500000044119666251010010010000100100005002847521002001820037200371842103187451010020010000200100002003720037111020110099100100100001000000000000071000116111979100100001002003820038200382003820038
10204200371550000006119686251010010010000100100005002847521002001820037200371842103187451010020010000200100002003720037111020110099100100100001000000000000071000116111979100100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371550061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100020640216221978610000102003820038200382003820038
10024200371560061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
10024200371550061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100020640216221978610000102003820038200382003820038
10024200371550061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
10024200371550061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100900640216221978610000102003820038200382003820038
10024200371550061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100020640216221978610000102003820038200382003820038
10024200371560082196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100020640216221978610000102003820038200382003820038
1002420037155006119686251001010100001010000502847521020018320037200371844331876710010201000020100002003720037111002110910101000010000165640216221978610000102003820038200382003820038
10024200371550061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
10024200371550061196862510010101000010100005028475210200180200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  ushll v0.2d, v8.2s, #3
  ushll v1.2d, v8.2s, #3
  ushll v2.2d, v8.2s, #3
  ushll v3.2d, v8.2s, #3
  ushll v4.2d, v8.2s, #3
  ushll v5.2d, v8.2s, #3
  ushll v6.2d, v8.2s, #3
  ushll v7.2d, v8.2s, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042005715500522580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151181160020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160120035800001002003920039200392003920039
802042003816500292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
802042003815501292580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
8020420038155007152580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
8020420038155001172580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001001011151180160020035800001002003920039200392003920039
8020420038155001342580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030818191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa7a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
8002420039156000005392580010108000010800005064000012001920038200389996310044800102080000208000020038200381180021109101080000100005020716962003580000102003920039200392003920039
8002420038155000004832580010108000010800005064000012001920038200389996310018800102080000208000020038200381180021109101080000100005020616692003580000102003920039200392003920039
800242003815500039304602580010108000010800005064000002001920038200389996310018800102080000208000020038200381180021109101080000100005020916692003580000102003920039200392003920039
80024200381550000034752580010108000010800005064000002001920038200389996310018800102080000208000020038200381180021109101080000100005020616992003580000102003920039200392003920039
8002420038155000003392580010108000010800005064000012001920038200389996310018800102080000208000020038200381180021109101080000100035020816962003580000102003920039200392003920039
80024200891561000032202580010108000010800005064075612001920038200389996310018800102080000208000020038200381180021109101080000100005020916792003580000102003920039200392003920039
8002420038155010068631342580010108000010800005064000012001920038200389996310018800102080000208000020038200381180021109101080000100005020716992003580000102003920039200392003920039
8002420038155000004392580010108000010800005064000002001920038200389996310018800102080000208000020038200381180021109101080000100005020916792003580000102003920039200392003920039
80024200381550000031302580010108000010800005064000002001920038200389996310018800102080000208000020038200381180021109101080000100335020916992003580000102003920039200392003920039
80024200381560000043172580010108000010800005064000002001920038200389996310018800102080000208000020038200381180021109101080000100005020916962003580000102003920039200392003920039