Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

USRA (vector, 2D)

Test 1: uops

Code:

  usra v0.2d, v1.2d, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a6a8cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004303723010325482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383074
100430372406125482510001000100039831313018303730372415329151000100020003037303711100110000073116112630100030383038303830743038
100430372406125482510001000114939831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
1004303723010325482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372406125482510001000100039831313018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372406125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372306125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038
100430372406125482510001000100039831303018303730372415328951000100020003037303711100110000073116112630100030383038303830383038

Test 2: Latency 1->1

Code:

  usra v0.2d, v1.2d, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)030a1e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1020430037233245612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010040071021622296340100001003003830038300383003830038
102043003723320612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043003723320612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043003723300612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
1020430037233265362954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043003723306612954825101001001000010010000500427731303001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043003723220612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043003723200612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043003723320612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038
102043003723220612954825101001001000010010000500427731313001830037300372826532874510100200100002002000030037300371110201100991001001000010000071021622296340100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5e60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)91inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a6a8accfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372330000006129548251001010100001010000504277313003001830037300372828732876710010201000020200003003730037111002110901010100001000006402162229630010000103003830038300383003830038
10024300372320000006129548251001010100001010000504277313003001830037300372828732876710010201000020200003003730037111002110901010100001000006402162229630010000103003830038300383003830038
10024300372330000006129548251001010100001010000504277313013001830037300372828732876710010201000020200003003730037111002110901010100001000006402162229630010000103003830038300383003830038
10024300372320000008229548251001010100001010000504277313013001830037300372828732876710010201000020200003003730037111002110901010100001000006402162229630010000103003830038300383003830038
10024300372320000008929548251001010100001010000504277313013001830037300372828732876710010201000020200003003730037111002110901010100001000036402162229630010000103003830038300383003830038
10024300372330000006129548251001010100001010000504277313003001830037300372828732876710010201000020200003003730037111002110901010100001000006402162229630010000103003830038300383003830038
10024300372330000006129548251001010100001010000504277313013001830037300372828732876710010201000020200003003730037111002110901010100001000006402162229630010000103003830038300383003830038
10024300372320000006129548251001010100001010000504277313013001830037300372828732876710010201000020200003003730037111002110901010100001000106402162229630010000103003830038300383003830038
10024300372330000006129548251001010100001010000504277313113001830037300372828732876710010201000020200003003730037111002110901010100001000106402162229630010000103003830038300383003830038
100243003723200000053629548251001010100001010000504277313003001830037300372828732876710010221000020200003003730037111002110901010100001000006402162229630010000103003830038300383003830038

Test 3: Latency 1->2

Code:

  usra v0.2d, v0.2d, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102043003723300197295472510100100100001001000050042771600300183003730037282526287331010020010000200200003003730037111020110099100100100001006401117222242229629100001003003830038300383003830038
10204300372330019729547251010010010000100100005004277160030018300373003728252628733101002001000020020000300373003711102011009910010010000100001117222242229629100001003003830038300383003830038
10204300372320019729547251010010010032100100005004277160030018300373003728271628740101002001000820020016300373003711102011009910010010000100331117170160029646100001003003830038300383003830038
10204300372330006129547251010010010000100100005004277160030018300373003728271628740101002001000820020016300373003711102011009910010010000100001117180160029645100001003003830038300383003830038
10204300372330006129547251010010010000100100005004277160030018300373003728271728740101002001000820020016300373003711102011009910010010000100001117170160029646100001003003830038300383003830038
10204300372330006129547251010010010000100100005004277160030018300373003728271728741101002001000820020016300373003711102011009910010010000100101117170160029645100001003003830038300383003830038
10204300372330006129547251010010010000100100005004277160030018300373003728271628741101002001000820020016300373003711102011009910010010000100001117170160029646100001003003830038300383003830038
10204300372330006129547251010011310000100100005224277160030018300373003728271628741101002001000820020016300373003711102011009910010010000100631117180160029646100001003003830038300383003830038
102043003722500061295472510100100100001001000050042771600300183003730037282717287411010020010008200200163003730037111020110099100100100001003701117180160029645100001003003830038300383003830038
102043003722500061295472510100100100001001000050042771600300183003730037282716287411010020010008200200163003730037111020110099100100100001002301117174242229629100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0307080a18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430358235311889427043395729493153100661210056121090061428662413027003036930361283133128898109132011147222198230367303717110021109101010000100195452793167315142988310000103003830038300383003830038
10024300372331010015026929547251001010100001010000504277160130018030037300372828632876710010201000020200003003730037111002110910101000010000644101610102962910000103003830038300383003830038
1002430037233101000026829547251001010100001010000504277160130018030037300372828632876710010201000020200003003730037111002110910101000010000644101610112962910000103003830038300383003830038
1002430037233101000026829547251001010100001010000504277160030018030037300372828632876710010201000020200003003730037111002110910101000010000644101610102962910000103003830038300383003830038
100243003723210100002100129547251001010100001010000504277160030018030037300372828632876710010201000020200003003730037111002110910101000010000644101611102962910000103003830038300383003830038
1002430037233101001202682954725100101010000101000050427716013001803003730037282863287671001020100002020000300373003711100211091010100001000064410161052962910000103003830038300383003830038
1002430037232101000026829547251001010100001010000504277160130018030228300372828632876710010201000020200003003730037111002110910101000010000644111611102962910000103003830038300383003830038
1002430037233101000026829547251001010100001010000504277160130018030037300372828632876710010201000020200003003730037111002110910101000010060644101610102962910000103003830038300383003830038
1002430037233101000026829547251001010100001010000504277160030018030037300372828632876710010201000020200003003730037111002110910101000010000644101610102962910000103003830038300383003830038
1002430037232101000028929547251001010100001010000504277160030018030037300372828632876710010201000020200003003730037111002110910101000010000644101610102962910000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  usra v0.2d, v8.2d, #3
  movi v1.16b, 0
  usra v1.2d, v8.2d, #3
  movi v2.16b, 0
  usra v2.2d, v8.2d, #3
  movi v3.16b, 0
  usra v3.2d, v8.2d, #3
  movi v4.16b, 0
  usra v4.2d, v8.2d, #3
  movi v5.16b, 0
  usra v5.2d, v8.2d, #3
  movi v6.16b, 0
  usra v6.2d, v8.2d, #3
  movi v7.16b, 0
  usra v7.2d, v8.2d, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)030b1e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6e74scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd0d2icache miss (d3)d5d6d9dbddinst fetch restart (de)e0eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204200911550029258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001001011110122000216003320062001600001002006620066200662006620066
160204200651560029258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001000011110123000316004420062001600001002006620066200662006620066
160204200651550029258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001000011110122000316004320062001600001002006620066200662006620066
160204200651550029258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001000311110123000316003420062001600001002006620066200662006620066
1602042006515500291618011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001000011110122000316003320062001600001002006620066200662006620066
160204200651550029258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001000011110122000216003420062001600001002006620066200662006620066
160204200651560029258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001001011110122000416005420129001600001002006620066200662006620066
1602042006515501229258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001000011110122000316003320062001600001002006620066200662006620066
160204200651561029258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001000011110122000416004420062001600001002006620066200662006620066
160204200651550029258011610080016100800285006401960020045200652006506128012820080028200160056200652006511160201100991001001600001000011110122000416003420062001600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)03081e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a6a8a9acc2cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160024200621560000452580010108000010800005064000011120027200462004632280010208000020160000200462004611160021109101016000010000000100424112520211171820043150160000102004720047200472004720047
160024200461550000872580010108000010800005064000001120031200502005032280010208000020160000200502005011160021109101016000010000000100394111320211181920043150160000102005320051200512005120051
160024200501550000512580010108000010800005064000011120027200462004632280010208000020160000200462004611160021109101016000010000000100444111920211211420043150160000102004720047200472004720047
160024200501560000452580010108000010800005064000011120027200462004632280010208000020160000200462004611160021109101016000010001000100447221826422202020047300160000102004720047200472004720047
1600242005015500006212580010108000010800005064000001120031200502005032280010208000020160000200502005411160021109101016000010001000100404111820211221820043150160000102004720047200472004720047
160024200461560000512580010108000010800005064000011120027200462004632280010208000020160000200462004611160021109101016000010000000100414111320211182020043300160000102005120051200512005120051
160024200501550000512580010108000010800005064000011120027200462004632280010208000020160000200462004611160021109101016000010001000100447122024422181820047150160000102005120051200512005120051
1600242005015500006322580010108000010800005064000001120031200502005032280010208000020160000200502004611160021109101016000010000000100367211924422141920047150160000102005120051200512005220051
160024200501550000512580010108000010800005064000001120031200502004632280010208000020160000200502005011160021109101016000010000000100457221720422171720047300160000102005120053200512005120051
160024200461550000452580010108000010800005064000001120027200502004632280010208000020160000200502005011160021109101016000010000000100437222024422171920050300160000102005120051200512004720051

Test 5: throughput

Count: 16

Code:

  usra v0.2d, v16.2d, #3
  usra v1.2d, v16.2d, #3
  usra v2.2d, v16.2d, #3
  usra v3.2d, v16.2d, #3
  usra v4.2d, v16.2d, #3
  usra v5.2d, v16.2d, #3
  usra v6.2d, v16.2d, #3
  usra v7.2d, v16.2d, #3
  usra v8.2d, v16.2d, #3
  usra v9.2d, v16.2d, #3
  usra v10.2d, v16.2d, #3
  usra v11.2d, v16.2d, #3
  usra v12.2d, v16.2d, #3
  usra v13.2d, v16.2d, #3
  usra v14.2d, v16.2d, #3
  usra v15.2d, v16.2d, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440049310051251601081001600081001600205001280132040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040400404004040040
160204400393100160251601081001600081001600205001280132040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040400404004040040
16020440039310030251601081001600081001600205001280132040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040400404004040040
16020440039311030251601081001600081001600205001280132140020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040400404004040040
16020440039311058251601081001600081001600205001280132140020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040400404004040040
16020440039311030251601081001600081001600205001280132140020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040400404004040088
16020440039310053251601081001600081001600205001280132140020400394003919977619990160120200160032200320064400394011211160201100991001001600001000001111011801600400361600001004004040040400404004040040
16020440039310030251601081001600081001600205001280132040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040400404004040040
16020440039311072251601081001600081001600205001280132140020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040400404004040040
16020440039310030251601081001600081001600205001280132040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000001111011801600400361600001004004040040402194004040040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)03081e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)dfe0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160024400393100540052251600101016000010160000501280000114002040039400391999632001916001020160000203200004003940039111600211091010160000100010026311716211353400363245160000104004040040400404004040040
160024400393100000462516001010160000101600005012800001140020400394003919996320019160010201600002032000040039400391116002110910101600001000100263114162114434008626910160000104004040040400404004040040
16002440039310000046251600101016000010160000501280000114002040039400391999632001916001020160000203200004003940039111600211091010160000100010026311416211443400362545160000104004040040400404004040040
16002440039310000046251600101016000010160000501280000114002040039400391999632001916001020160000203200004003940039111600211091010160000100010026311616211543400362565160000104004040040400404004040040
160024400393110000462516001010160000101600005012800001140071400394003919996320019160010201600002032000040039400391116002110910101600001000100263114162113434003627010160000104004040040400404004040040
16002440039310000074251600101016000010160000501280000114002040039400391999632001916001020160000203200004003940039111600211091010160000100010026311416211433400363045160000104004040040400404004040040
160024400393100000462516001010160000101600005012800001140020400394003919996320019160010201600002032000040039400391116002110910101600001000100263115162114334003630210160000104004040040400404004040040
16002440039310000046251600101016000010160000501280000114002040039400391999632001916001020160000203200004003940039111600211091010160000100010026311316211543400363065160000104004040040400404004040040
16002440039310000046251600101016000010160000501280000114002040039400391999632001916001020160000203200004003940039111600211091010160000100010026321516211443400363065160000104004040040400404004040040
16002440039311000046251600101016000010160000501280000014002040039400391999632001916001020160000203202804003940039111600211091010160000100010028312416412443400366855160000104004040040400404004040040