Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

USRA (vector, 2S)

Test 1: uops

Code:

  usra v0.2s, v1.2s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)03080b18191e1f3a3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a0a1a6a8a9acc2cfd0d5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100430372400000006125482510001000100039831303018303730372415328951000100020003037303711100110000000000730116112630100030383038303830383038
100430372300000006125482510001000100039831303018303730372415328951000100020003037303711100110000000000730124112630100030383038303830383038
1004303724000012006125482510001000100039831303018303730372415328951000100020003037303711100110000000000730116112630100030383038303830383038
100430372400000006125482510001000100039831303018303730372415328951000100020003037303711100110000001000730116112630100030383038303830383038
100430372400000006125482510001000100039831303018303730372415328951000100020003037303711100110000000000730116112630100030383038303830383038
100430372300000006125482510001000100039831303018303730372415328951000100020003037303711100110000000030730116112630100030383038303830383038
100430372300000006125482510001000100039831303018303730372415328951000100020003037303711100110000000000730116112630100030383038303830383038
1004303723000012006125482510001000100039831303018303730372415328951000100020003037303711100110000000000730116112630100030383038303830383038
1004303723000000061254825100010001000398313030183037303724153289510001000200030373037111001100000016000730116112630100030383038303830383038
100430372400000006125482510001000100039831303018303730372415328951000100020003037303711100110000000000730116112630100030383038303830383038

Test 2: Latency 1->1

Code:

  usra v0.2s, v1.2s, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03080b191e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8accfd5d6ddinst fetch restart (de)e0ebec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372330001261295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000000710216112963400100001003003830038300383003830038
1020430037232000061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000000710116112963420100001003003830038300383003830038
1020430037232000061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000003710116112963400100001003003830038300383003830038
10204300372320000726295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000000710116112966400100001003003830038300383003830038
1020430037233000066295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000000710116112963400100001003003830038300383003830038
1020430037233000061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000000710116112963400100001003003830038300383003830038
1020430037233000061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000010710116112963400100001003003830038300383003830038
1020430037233000061295482510100100100001001000050042786753001830037300372826532874510100200100002002000030037300371110201100991001001000010000000710116112963400100001003003830038300383003830038
1020430037232000061295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000000710116112963400100001003003830038300383003830038
10204300372330001261295482510100100100001001000050042773133001830037300372826532874510100200100002002000030037300371110201100991001001000010000000710116112963400100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03181e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
100243003723300612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300713003830038
100243003723300612954825100101010000101000050427731303001830037300372828732876710010201000020200003003730037111002110910101000010029080640216222963010000103003830038300383003830038
100243003723300612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
100243003723300612954825100101010000101000050427779713001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
100243003723200612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
1002430037233012612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
1002430037233003612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
1002430037232001482954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
100243003722500612954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038
1002430037233001172954825100101010000101000050427731313001830037300372828732876710010201000020200003003730037111002110910101000010000640216222963010000103003830038300383003830038

Test 3: Latency 1->2

Code:

  usra v0.2s, v0.2s, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372253300251295472510100100100001001000050042771601300183003730037282527287411010020010008200200163003730037211020110099100100100001000001117170160029645100001003003830038300383003830038
102043003722500061295472510100100100001001000050042771601300183003730037282716287401010020010008200200163003730037111020110099100100100001000001117180160029646100001003003830038300383003830080
102043003722500061295472510100100100001001000050042771600300183003730037282716287401010020010008200200163003730037111020110099100100100001000001117170160029645100001003003830038300383003830038
102043003722560061295472510100100100001001000050042771600300183003730037282716287411010020010008200200163003730037111020110099100100100001000001117180160029646100001003003830038300383003830038
1020430037225600612954725101001001000010010000500427716003001830037300372827162874010100200100082002001630037300371110201100991001001000010000121117170160029646100001003003830038300383003830038
10204300372259176061295472510100100100001001000050042771601300183003730037282717287401010020010008200203483003730037111020110099100100100001000001117180160029646100001003003830038300383003830038
1020430037232180061295472510100100100001001000050042771600300183003730037282716287401010020010008200200163003730037111020110099100100100001000001117170160029645100001003003830038300383003830038
102043003722560061295472510100100100001001000050042771600300183003730037282717287401010020010008200200163003730037111020110099100100100001000001117180160029646100001003003830038300383003830038
102043003722590061295472510100100100001001000050042771601300183003730037282717287411010020010008200200163003730037111020110099100100100001000001117170160029645100001003003830038300383003830038
1020430037225240061295472510100100100001001000050042771600300183003730037282716287401010020010008200200163003730037111020110099100100100001000001117170160029645100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037225906129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640416222962910000103003830038300383003830038
1002430037225606129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640216222962910000103003830038300383003830038
100243003722415006129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640216222962910000103003830038300383003830038
10024300372254506129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640216222962910000103003830038300383003830038
100243003722553706129547251001010100001010000504277160130018300373003728286328767101602010000202000030037300371110021109101010000100000640216222962910000103003830038300383003830038
10024300372252406129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640216222962910000103003830038300383003830038
10024300372242406129547251001010100001010000504277160130018300373003728286328767100102010000202000030037300371110021109101010000100000640216222962910000103003830038300383003830038
1002430037225606129529251001010100001010000504277160130018300373003728286328767100102010000202000030037300371110021109101010000100000640216222962910000103003830038300383003830038
10024300372252706129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300372110021109101010000100000640216222962910000103003830038300383003830038
10024300372241206129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640216222962910000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  usra v0.2s, v8.2s, #3
  movi v1.16b, 0
  usra v1.2s, v8.2s, #3
  movi v2.16b, 0
  usra v2.2s, v8.2s, #3
  movi v3.16b, 0
  usra v3.2s, v8.2s, #3
  movi v4.16b, 0
  usra v4.2s, v8.2s, #3
  movi v5.16b, 0
  usra v5.2s, v8.2s, #3
  movi v6.16b, 0
  usra v6.2s, v8.2s, #3
  movi v7.16b, 0
  usra v7.2s, v8.2s, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)0307080a0b18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1602042006515000003012002925801161008001610080028500640196020045200652006561280128200800282001600562006520065111602011009910010016000010000000030111101191114112006201600001002006620066200662006620066
160204200651501010006300292580116100800161008013250064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000100011110119116112006201600001002006620066200662006620066
160204200651511010205700502580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119116112006201600001002006620066200662006620066
160204201461501010003000292580116100800161008002850064019602011020065200656758012820080028200160056202272006511160201100991001001600001000000000011110119116112006201600001002006620066200662006620066
160204200651501010306300292580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119116112006201600001002006620066200662006620066
1602042006515010100063002662580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000000000011110119116112013001600001002045520402204052045620402
1602042040015301114468435209181868064510080436104805525006435480203752039220390459880552200804532021608982045820400611602011009910010016000010000001024002111102164148122039601600001002048420403204772048420403
1602042047915421014567844009742980100100800001008000050064000002005620075200756218010020080000200160000200752007511160201100991001001600001002000003011110122324332007201600001002015520076200762007620157
160204200751500001007500742980100100800001008000050064000002005620075201646218010020080000200160000200752007511160201100991001001600001000000001480011110122324342007201600001002007620076202392007620076
160204200751500000007800952980100100800001008000050064251202005620075200756218010020080000200160000200752007511160201100991001001600001000000000011110122324332007201600001002007620076200762007620076

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)031e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8a9accdcfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0ea? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16002420086156750932580010108000010800005064000010020031200462004632280010208000020160000200462004611160021109101016000010001030100291142524422342004730160000102005120051200512005120051
1600242005015054051258001010800001080000506400000152003120050200503228001020800002016000020050200501116002110910101600001000323010027841420211442004315160000102004720047200472004720047
1600242004615051087258001010800001080000506400001002002720046200463228001020800002016000020046200461116002110910101600001000103010026841320211442004315160000102004720047200472004720047
16002420046150510932580010108000010800005064000001520031200502005032280010208000020160000200502005011160021109101016000010001030100301152420422432004730160000102005120051200512005120051
160024200501502760662580010108000010800005064000011520027200462004632280010208000020160000200462004611160021109101016000010001030100301152424422442004730160000102005120051200512005120051
1600242005015039087258001010800001080000506400001002002720050200503228001020800002016000020050200501116002110910101600001000003010026311420211442004315160000102004720047200472004720047
160024200461500045258001010800001080000506400001052002720050200503228001020800002016000020050200501116002110910101600001000103010026811420211432004315160000102004720047200472004720047
1600242004615063045258001010800001080000506400001002002720050200503228001020800002016000020050200501116002110910101600001000100010026811320211342004315160000102004720047200472004720047
160024200461505103302580010108000010800005064000010020027200462004632280010208000020160000200462004611160021109101016000010001030100291152324422432004730160000102005120051200512005120051
1600242005015030087258001010800001080000506400001152002720046200463228001020800002016000020046200461116002110910101600001000103010026341420211432004315160000102004720047200472004720047

Test 5: throughput

Count: 16

Code:

  usra v0.2s, v16.2s, #3
  usra v1.2s, v16.2s, #3
  usra v2.2s, v16.2s, #3
  usra v3.2s, v16.2s, #3
  usra v4.2s, v16.2s, #3
  usra v5.2s, v16.2s, #3
  usra v6.2s, v16.2s, #3
  usra v7.2s, v16.2s, #3
  usra v8.2s, v16.2s, #3
  usra v9.2s, v16.2s, #3
  usra v10.2s, v16.2s, #3
  usra v11.2s, v16.2s, #3
  usra v12.2s, v16.2s, #3
  usra v13.2s, v16.2s, #3
  usra v14.2s, v16.2s, #3
  usra v15.2s, v16.2s, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204400583000512516010810016000810016002050012801320400204003940039199770619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040
16020440039300030251601081001600081001600205001280132040020400394003919977061999016012020016003220032006440039400391116020110099100100160000100000132011110118016004003601600001004004040040400404004040040
160204400393000302516010810016000810016002050012801320400204003940039199770619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040
160204400393000302516010810016000810016002050012801320400204003940039199770619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040
160204400393000302516010810016000810016002050012801320400204003940039199770619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040
160204400393000512516010810016000810016002050012801320400204003940039199777619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040
1602044003930005422516010810016000810016002050012801320400204003940039199770619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040
160204400393000302516010810016000810016002050012801320400204003940039199770619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040
160204400392990722516010810016000810016002050012801320400204003940039199770619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040
160204400393000302516010810016000810016002050012801320400204003940039199770619990160120200160032200320064400394003911160201100991001001600001000000011110118016004003601600001004004040040400404004040040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0304070a18191e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8accfd0d2icache miss (d3)itlb miss (d4)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600244003930000100105015225160010101600001016000050128000011040020400394003919996032001916001020160000203200004003940039111600211091010160000100301002432114316111383940036165160000104004040040400404004040040
160024400393001000000169251600101016000010160000501280000105400204003940039199960320019160010201600002032000040039400391116002110910101600001005101002382113716111383740036165160000104004040040400404004040040
160024400392991010000069251600101016000010160000501280000110400204003940039199960320019160010201600002032000040039400391116002110910101600001008010024321140161113738400361610160000104004040040400404004040040
16002440039300110000018125160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100001002482113916111373840036165160000104004040040400404004040040
16002440039299100000018151160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100101002331113216111394140036165160000104004040040400404004040040
16002440039300101000008125160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940089111600211091010160000100101002382113716111373640036165160000104004040040400404004040040
16002440039299110000006925160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100001002381113716111372540036165160000104004040040400404004040040
16002440039299111000018125160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100301002482114016111392440036165160000104004040040400404004040040
160024400393001110001041111251600101016000010160000501280000105400204003940039199960320019160010201600002032000040039400391116002110910101600001000010024321139161310343840036165160000104004040040400404004040040
16002440039300100000008125160010101600001016000050128000011040020400394003919996032001916001020160000203200004003940039111600211091010160000100301002482112116111393940036165160000104004040040400404004040040