Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

USRA (vector, 8B)

Test 1: uops

Code:

  usra v0.8b, v1.8b, #3
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)030b18191e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0eb? fp/simd (ee)f5f6f7f8fd
10043037230000166254825100010001000398313030183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303723000061254825100010001000398313130183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303724000061254825100010001000398313130183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303723000061254825100010001000398313030183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303723000061254825100010001000398313130183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303723000084254825100010001000398313030183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303723000061254825100010001000398313030183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303723000061254825100010001000398313030183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303724000061254825100010001000398313030183037303724153289510001000200030373037111001100000731161126300100030383038303830383038
1004303723000061254825100010001000398313030183037303724153289510001000200030373037111001100000731161126300100030383038303830383038

Test 2: Latency 1->1

Code:

  usra v0.8b, v1.8b, #3
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03081e3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372330010329548251010010010000100100005004277313130018300373003728265328745101002001000020020000300373003711102011009910010010000100000007101161129634100001003003830038300383003830038
1020430134233008929548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100030007101161129634100001003003830038300383003830038
1020430037232006129548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000007101161129634100001003003830038300383003830038
1020430037233006129548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000007101161129634100001003003830038300383003830038
10204300372330126129548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000007101161129634100001003003830038300383003830038
1020430037233006129548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000008001161129634100001003003830038300383003830038
1020430037233006129548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000007101161129634100001003003830038300383003830038
1020430037232006129548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000007101161129634100001003003830038300383003830038
1020430037233006129548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000007101161129634100001003003830038300383003830038
10204300372330072629548251010010010000100100005004277313030018300373003728265328745101002001000020020000300373003711102011009910010010000100000007101161129634100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)0308090b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5cfd5d6dbddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002430037232000000061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000064021602229630010000103003830038300383003830038
1002430037233000000061295302510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000001000064021602229630010000103003830038300383003830038
1002430037233000000061295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000000000064021602229630010000103003830038300383003830038
1002430037233000000061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000064021602229630010000103003830038300383003830038
1002430037241000000061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000000000064021602229630010000103003830038300383003830038
1002430037232000110061295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000000000064021602229630010000103003830038300383003830038
1002430037233000000061295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000000000064021602229630010000103003830038300383003830038
1002430037233000000061295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000000000064021602229630010000103003830038300383003830038
1002430037233000000061295482510010101000010100005042773130300183003730037282873287671001020100002020000300373003711100211091010100001000000000064021602229630010000103003830038300383003830038
1002430037233000000061295482510010101000010100005042773131300183003730037282873287671001020100002020000300373003711100211091010100001000001000064021602229630010000103003830038300383003830038

Test 3: Latency 1->2

Code:

  usra v0.8b, v0.8b, #3
  movi v0.16b, 1

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)03070a18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10204300372330000543006129547251010010010000100100005004277160030018300373003728252628741101002001000820020016300373003711102011009910010010000100000011171811611296490100001003003830038300383003830038
102043003723211005160025129547251010010010000100100005004277160030018300373003728271628740101002001000820020016300373003711102011009910010010000100000011171811611296490100001003003830038300383003830038
10204300372331100510006129547251010010010000100100005004277160030018300373003728271628740101002001000820020016300373003711102011009910010010000100000011171711611296490100001003003830038300383003830086
10204300372331100780132012429547251010010010000100100005004277160030018300373003728271628740101002081000820020016300373003711102011009910010010000100000011171711611296500100001003003830038300383003830038
10204300372331100645006129547251010010010000100100005004277160030018300373003728271728740101002001000820020016300373003711102011009910010010000100000011171811611296490100001003003830038300383003830038
102043003723311006810010329520251010010010000100100005004277160030018300373003728271628741101002001000820020016300373003711102011009910010010000100010011171811611296490100001003003830038300383003830038
1020430037233110069006129547251010010010000100100005004277160030018300373003728271728741101002001000820020016300373003711102011009910010010000100002011171811611296500100001003003830038300383003830038
10204300372331100522006129547251010010010000100100005004277160030018300373003728271628741101002001000820020016300373003711102011009910010010000100000011171811611296500100001003003830038300383003830038
102043003723211000006129547251010010010000100100005004277160030018300373003728271728740101002001000820020016300373003711102011009910010010000100000011171811611296490100001003003830038300383003830038
10204300372331100510010329547251010010010000100100005004277160030018300373003728271728741101002001000820020016300373003711102011009910010010000100000011171811611296500100001003003830038300383003830038

1000 unrolls and 10 iterations

Result (median cycles for code): 3.0037

retire (01)cycle (02)031e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024300372332406129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640316442962910000103003830038300383003830038
10024300372322108929547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640416442962910000103003830038300383003830038
10024300372323906129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640416342962910000103003830038300383003830038
1002430037233606129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640416442962910000103003830038300383003830038
10024300372333008229547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100003640316442962910000103003830038300383003830038
100243003723351306129547251001010100001010000504277160130018300373003728286328767100102010000202000030084300371110021109101010000100000640416442962910000103003830038300383003830038
1002430037233330072629547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640416432962910000103003830038300383003830038
100243003723301086129547251001010100001010000504277160130018300373003728286328767100102010000202000030037300371110021109101010000100009640416432966110000103003830038300383003830038
100243003723340806129547251001010100001010000504277160030018300373003728286328767100102010000202000030037300371110021109101010000100000640416342962910000103003830038300383003830038
10024300372333306129547251001010100001010000504277160130018300373003728286328767100102010000202000030037300371110021109101010000100100640316432962910000103003830038300383003830038

Test 4: throughput

Count: 8

Code:

  movi v0.16b, 0
  usra v0.8b, v8.8b, #3
  movi v1.16b, 0
  usra v1.8b, v8.8b, #3
  movi v2.16b, 0
  usra v2.8b, v8.8b, #3
  movi v3.16b, 0
  usra v3.8b, v8.8b, #3
  movi v4.16b, 0
  usra v4.8b, v8.8b, #3
  movi v5.16b, 0
  usra v5.8b, v8.8b, #3
  movi v6.16b, 0
  usra v6.8b, v8.8b, #3
  movi v7.16b, 0
  usra v7.8b, v8.8b, #3
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2508

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
160204200651550292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
160204200651550292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
160204200651550712580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
160204200651560292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
160204200651560292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
1602042006515601342580116100800161008002850064019602004520065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
1602042006515603142580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
160204200651550292580116100800161008002850064019602006820065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
160204200651550292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001000001111011911611200621600001002006620066200662006620066
160204200651560292580116100800161008002850064019612004520065200656128012820080028200160056200652006511160201100991001001600001001001111011911611200621600001002006620066200662006620066

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2506

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f60696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)91inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8acc5cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaec? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600242007115535125800101080000108000050640000112003520050200463228001020800002016000020050200501116002110901010160000100000100306218204224220043300160000102004720051200472005220051
16002420051156125125800101080000108000062640000112003720050200503228001020800002016000020046200461116002110901010160000100000100276214202222420047150160000102004720051200472004720047
1600242004615504525800101080000108000050640000112003520046200463228001020800002016000020050200501116002110901010160000100000100306214202112420043300160000102005120052200512004720047
1600242004615564525800101080000108000050640000112003520050200463228001020800002016000020046200501116002110901010160000100100100773224244224220043160160000102004720051200472004920047
1600242005015505125800101080000108000050640000112003520048200483228001020800002016000020050200461116002110901010160000100000100303114244112420043150160000102004720047200472004720047
1600242004615504525800101080000108000050640000112003520051200463228001020800002016000020046200461116002110901010160000100000100276112242214220043150160000102004720051200512005120047
16002420046155342525800101080000108000050640000112003520046200463228001020800002016000020050200461116002110901010160000100000100286214202114220043150160000102004720047200472004720051
1600242005015504525800101080000108000050640000112003520046200463228001020800002016000020046200461116002110901010160000100000100253213202114420043150160000102005120047200512004720047
1600242004615504525800101080000108000050640000112003920046200463228001020800002016000020046200501116002110901010160000100000100273112202112420043150160000102004720047200472004720047
160024200461552404525800101080000108000050640000112003520047200463228001020800002016000020046200461116002110901010160000100030100286114202224220043150160000102004720047200472005120125

Test 5: throughput

Count: 16

Code:

  usra v0.8b, v16.8b, #3
  usra v1.8b, v16.8b, #3
  usra v2.8b, v16.8b, #3
  usra v3.8b, v16.8b, #3
  usra v4.8b, v16.8b, #3
  usra v5.8b, v16.8b, #3
  usra v6.8b, v16.8b, #3
  usra v7.8b, v16.8b, #3
  usra v8.8b, v16.8b, #3
  usra v9.8b, v16.8b, #3
  usra v10.8b, v16.8b, #3
  usra v11.8b, v16.8b, #3
  usra v12.8b, v16.8b, #3
  usra v13.8b, v16.8b, #3
  usra v14.8b, v16.8b, #3
  usra v15.8b, v16.8b, #3
  movi v16.16b, 17

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0304080b1e1f3a3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)6061696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8a9acc5branch mispredict (cb)cdcfd6dde0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
16020440061310000000302516010810016000810016002050012801320040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039322000000302516010810016000810016002050012801320040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039311000000302516010810016000810016002050012801321040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039310000000582516010810016000810016002050012801320040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039310000000302516010810016000810016002050012801320040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039321000900302516010810016000810016002050012801320040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039310000000302516010810016000810016002050012801321040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039310000900302516010810016000810016002050012801320040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039311000000582516010810016000810016002050012801320040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040
16020440039310000001302516010810016000810016002050012801321040020400394003919977619990160120200160032200320064400394003911160201100991001001600001000000111101181604003601600001004004040040400404004040040

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2502

retire (01)cycle (02)0318191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5f6061696d6edispatch stall (70)72scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8a9acbranch mispredict (cb)cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaeb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1600244004031000004625160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100000000100228318162116640036207160000104004040040400404004040040
1600244003931000006825160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100000000100228416162115540036206160000104004040040400404004040040
1600244003931000004625160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100000000100228415162115740036206160000104004040040400404004040040
16002440039311003071125160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100000000100228513162113740036206160000104004040040400404004040040
1600244003931000004625160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100000000100228516162116740036206160000104004040040400404004040040
1600244003931000904625160010101600001016000050128000011540020400394003920005032001916011520160209203200004003940039111600211091010160000100000247301005685151621131140036206160000104004040040400404004040040
16002440039311100044825160206101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100000000100228515162113740036206160000104004040040400404004040040
1600244003931000004625160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100020000100408513162116640036206160000104004040040400404004040040
1600244003931000004625160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100000000100228513162119540036206160000104004040040400404004040040
1600244003931000004625160010101600001016000050128000011540020400394003919996032001916001020160000203200004003940039111600211091010160000100000000100228519162129440036226160000104004040040400404004040040