Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UXTL2 (4S)

Test 1: uops

Code:

  uxtl2 v0.4s, v0.8h
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)031e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
100420371601251686251000100010002645212018203720371571318951000100010002037203711100110000073216111786100020382038203820382038
10042037160611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
10042037150611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
10042037160611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
10042037160611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
10042037160611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038
100420371601151686251000100010002645212018203720371571318951000100010002037203711100110001073116111786100020382038203820382038
10042037150611686251000100010002645212018203720371571318951000100010002037203711100110001373116111786100020382038203820382038
1004203715168611686251000100010002645212018203720371571318951000100010002037203711100110000373116111786100020382038203820382038
10042037160611686251000100010002645212018203720371571318951000100010002037203711100110000073116111786100020382038203820382038

Test 2: Latency 1->2

Code:

  uxtl2 v0.4s, v0.8h
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)0307080a0b18191e1f3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102042003715500200000061196862510100100100001001000050028475210200182003720084184213187451010020010000200100002003720037111020110099100100100001000000000071021622197910100001002003820038200382003820038
102042003715500200000061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071021622197910100001002003820038200382003820038
1020420037155002000120061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071021622197910100001002003820038200382003820038
102042003715500200000061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071021622197910100001002003820038200382003820038
102042003715500200000061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037311020110099100100100001000000100071021622197910100001002003820038200382003820038
1020420037155002000000131196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071021622197910100001002003820038200382003820038
102042003715500200000061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071021622197910100001002003820038200382003820038
102042003715500000000061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071021622197910100001002003820038200382003820038
1020420037155002000000536196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071021622197910100001002003820038200382003820038
102042003715500200000061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720179111020110099100100100001000000000071021622197910100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)030b181e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)5e60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa1a8a9accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
1002420037155000061196862510010101000010100005028475210020018200372003718443318767100102010000201000020037200371110021109101010000100003640216221978610000102003820038200382003820038
1002420037156000061196862510010101000010100005028475211020018200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
10024200371560012082196862510010101000010100005028475210020018200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
1002420037161000061196862510010101000010100005028475210020018200372003718443318767100102010000201000020037201791110021109101010000100000640216221978610000102003820038200382003820038
1002420037156000061196862510010101000010100005028475210020018200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
1002420037155000061196862510010101000010100005028475210020018200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
10024200371550000935196862510010101000010100005028475210020018200372003718443318767100102010000201000020037200371110021109101010000100003640216221978610000102003820038200382003820038
1002420037156000061196862510010101000010100005028475210020018200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
10024200371550012061196862510010101000010100005028475210020018200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038
1002420037155000061196862510010101000010100005028475210020018200372003718443318767100102010000201000020037200371110021109101010000100000640216221978610000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  uxtl2 v0.4s, v8.8h
  uxtl2 v1.4s, v8.8h
  uxtl2 v2.4s, v8.8h
  uxtl2 v3.4s, v8.8h
  uxtl2 v4.4s, v8.8h
  uxtl2 v5.4s, v8.8h
  uxtl2 v6.4s, v8.8h
  uxtl2 v7.4s, v8.8h
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)030b1e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
802042005915500292580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
80204200381550261292580108100800081008002050064013212001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180490020035800001002003920039200392003920039
802042003815500572580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
802042003815600292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
80204200381610114292580108100800081008002050064013202001920038200389977699898041620080032200800322003820038118020110099100100800001004011151180160020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180280020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039
802042003815500292580108100800081008002050064013202001920038200389977699898012020080032200800322003820038118020110099100100800001000011151180160020035800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)031e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a8accficache miss (d3)d5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242005115508125800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001001050200216222003580000102003920039200392003920039
800242003815503925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000050200216222003580000102003920039200392003920039
800242003815503925800101080000108000050640000020019200382003899963100188001020800002080000200752003811800211091010800001000050200216222003580000102003920039200392003920039
8002420038155123925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001000050200216222003580000102003920039200392003920039
800242003815503925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000050200216222003580000102003920039200392003920039
800242003815503925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000350200216222003580000102003920039200392003920039
800242003815503925800101080000108000050640000120019200382003899963100188001020800002080000200382003811800211091010800001000050200216222003580000102003920039200392003920039
800242003815506725800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000050200216222003580000102003920039200392003920039
800242003815503925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001005050200216222003580000102003920039200392003920039
800242003815503925800101080000108000050640000020019200382003899963100188001020800002080000200382003811800211091010800001000050202216222003580000102003920039200392003920039