Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

UXTL2 (8H)

Test 1: uops

Code:

  uxtl2 v0.8h, v0.16b
  movi v0.16b, 1
  movi v1.16b, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 0.000

Load/store unit issues: 0.000

SIMD/FP unit issues: 1.000

retire (01)cycle (02)030b1e3f4e51inst issue (52)~issue fp/simd (54)~dispatch fp/simd (57)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op fp/simd (7e)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst neon or fp (9a)a0a8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)f5f6f7f8fd
1004203715006116862510001000100026452120182037203715713189510001000100020372037111001100000073216111786100020382038203820382038
1004203716166116862510001000100026452120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203716036116862510001000100026452120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
10042037150126116862510001000100026452120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203717006116862510001000100026452120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203716006116862510001000100026452120182037203715713189510001000100020372037111001100020373116111786100020382038203820382038
1004203716006116862510001000100026452120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203715006116862510001000100026452120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203716006116862510001000100026452120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038
1004203716006116862510001000100026452120182037203715713189510001000100020372037111001100000073116111786100020382038203820382038

Test 2: Latency 1->2

Code:

  uxtl2 v0.8h, v0.16b
  movi v0.16b, 1
  movi v1.16b, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)03080b18191e1f3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a8acc2c5branch mispredict (cb)cfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
102042003715600009061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071011611197910100001002003820038200382003820038
102042003715600000061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071011611197910100001002003820038200382003820038
102042003715500000061196862510100100100001001000050028475211200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071011612197910100001002003820085200382003820038
1020420037155000000611968625101001001000010010000500284752102001820037200371842131874510100200100002001000020037200371110201100991001001000010000021000071011611197910100001002003820038200382003820087
10204200371550000006119686251010010010000100100005002847521020018200862003718421318745101002001016820010000200372003711102011009910010010000100000130000822351211993121100001002027820278202292028120277
102042027615711556725282601196311431017513010060138107606762853841020198202782027718442281883710892218108302241066320276202747110201100991001001000010002219940200822273111997130100001002028720277202782027920276
10204202751571100006119686251010010010000100100005002847521020018200372003718421318745101002001000020010000200372003711102011009910010010000100020221200071011611197910100001002003820038200382003820038
102042003715500000061196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000001000071011611197910100001002003820038200382003820038
1020420037155000000271196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000000071011611197910100001002003820038200382003820038
1020420037155000000103196862510100100100001001000050028475210200182003720037184213187451010020010000200100002003720037111020110099100100100001000000300071011611197910100001002003820038200382003820038

1000 unrolls and 10 iterations

Result (median cycles for code): 2.0037

retire (01)cycle (02)031e3a3f4e51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8accfd5d6ddinst fetch restart (de)e0? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
10024200371500061196862510010101000010100005028475212001820037200371844331876710010201000020100002003720037111002110910101000010084640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001040640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001059640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001012023640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001000640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001003640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001000640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001000640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001033640316331978610000102003820038200382003820038
1002420037150006119686251001010100001010000502847521200182003720037184433187671001020100002010000200372003711100211091010100001013640316331978610000102003820038200382003820038

Test 3: throughput

Count: 8

Code:

  uxtl2 v0.8h, v8.16b
  uxtl2 v1.8h, v8.16b
  uxtl2 v2.8h, v8.16b
  uxtl2 v3.8h, v8.16b
  uxtl2 v4.8h, v8.16b
  uxtl2 v5.8h, v8.16b
  uxtl2 v6.8h, v8.16b
  uxtl2 v7.8h, v8.16b
  movi v8.16b, 9

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)0308090b18191e1f3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa0a1a6a7a8a9acc2c5branch mispredict (cb)cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
80204200381560000012029258010810080008100800205006401321200190200382003899776998980120200800322008003220038200381180201100991001008000010000001000111511801600200350800001002003920039200392003920039
8020420038155000000029258010810080008100800205006401321200190200382003899776998980120200800322008003220038200381180201100991001008000010000000000111511801600200350800001002003920039200392003920039
8020420038155000000031258010810080008100800205006401320200190200382003899776998980120200800322008003220038200381180201100991001008000010000000000111511801600200350800001002003920039200392003920039
8020420038161000000029258010810080008100800205006401320200190200382003899776998980120200800322008003220038200381180201100991001008000010000000000111511801600200350800001002003920039200392003920039
8020420038155000000029258010810080008100800205006401320200190200382003899776998980120200800322008003220038200381180201100991001008000010000000000111511801600200350800001002003920039200392003920039
8020420038155000000029258010810080008100800205006401321200190200382003899776998980120200800322008003220038200381180201100991001008000010000000000111511801610200350800001002003920039200392003920039
8020420038155000000071258010810080008100800205006401320200190200382003899776998980120200800322008003220038200381180201100991001008000010000000000111511801600200350800001002003920039200392003920039
8020420038155000000029258010810080008100800205006401321200190200382003899776998980120200800322008003220038200381180201100991001008000010000000000111511801600200350800001002003920039200392003920039
80204200381550000000253258010810080008100800205006401320200190200382003899776998980120200800322008003220038200381180201100991001008000010000000030111511801600200350800001002003920039200392003920039
8020420038155000000029258010810080008100800205006401321200190200382003899776998980120200800322008003220038200381180201100991001008000010000002000111511801600200350800001002003920039200392003920039

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2505

retire (01)cycle (02)03041e3f51inst issue (52)~issue int (53)~issue fp/simd (54)~dispatch int (56)~dispatch fp/simd (57)huge thing int (59)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op fp/simd (7e)~map lookup int (7f)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst neon or fp (9a)9fa8acc2c5cfd2icache miss (d3)d5d6dbddinst fetch restart (de)e0eb? fp/simd (ee)gpr retires (ef)f5f6f7f8fd
800242003915611239258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010030050200021602220035080000102003920039200392003920039
80024200381560039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010000050200021602220035080000102003920039200392003920039
80024200381550039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010000050200031602220035080000102003920039200392003920039
800242003815500960258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010000050200021603220035080000102003920039200392003920039
800242003815500229258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010000050200031604320035080000102003920039200392003920039
80024200381560039258001010800001080000506400001200192003820038999631001880010208000020800002003820089118002110910108000010000050200031602220035080000102003920039200392003920039
80024200381560039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010000050200031603420035080000102003920039200392003920039
80024200381550039258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010000050200021602220035080000102003920039200392003920039
800242003815600556258001010800001080000506400000200192003820038999631001880010208000020800002003820038118002110910108000010000050200021602220035080000102003920039200392003920072
80024200381560039258001010800001080000506400001200192003820038999631001880010208000020800002003820038118002110910108000010000050200021604320035080000102003920039200392003920039