Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

ISB (SY)

Test 1: uops

Code:

  isb sy

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 4.000

Issues: 0.000

Integer unit issues: 0.001

Load/store unit issues: 0.000

SIMD/FP unit issues: 0.000

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	? int output thing (e9)
4004	25024	1	1	1
4004	25024	1	1	1
4004	25024	1	1	1
4004	25024	1	1	1
4004	25024	1	1	1
4004	25024	1	1	1
4004	25024	1	1	1
4004	25024	1	1	1
4004	25024	1	1	1
4004	25024	1	1	1

Test 2: throughput

Code:

  isb sy

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 25.0135

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	dispatch int uop (56)	int uops in schedulers (59)	dispatch uop (78)	map int uop (7c)	map int uop inputs (7f)	? int output thing (e9)	? int retires (ef)
40204	250160	101	101	100	300	100	200	200	1	100
40204	250135	101	101	100	300	100	200	200	1	100
40204	250146	101	101	100	300	100	200	200	1	100
40204	250135	101	101	100	300	100	200	200	1	100
40204	250135	101	101	100	300	100	200	200	1	100
40204	250135	101	101	100	300	100	200	200	1	100
40204	250135	101	101	100	300	100	200	200	1	100
40204	250135	101	101	100	300	100	200	196	1	98
40204	250135	101	101	100	300	100	200	200	1	100
40204	250135	101	101	100	300	100	200	200	1	100

1000 unrolls and 10 iterations

Result (median cycles for code): 25.0040

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	schedule simd uop (54)	schedule ldst uop (55)	dispatch int uop (56)	dispatch simd uop (57)	dispatch ldst uop (58)	int uops in schedulers (59)	simd uops in schedulers (5a)	ldst uops in schedulers (5b)	dispatch uop (78)	map int uop (7c)	map ldst uop (7d)	map simd uop (7e)	map int uop inputs (7f)	? int output thing (e9)	? int retires (ef)
40024	250056	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40024	250051	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40024	250040	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40024	250040	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40025	250068	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40024	250040	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40024	250040	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40024	250040	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40024	250040	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10
40025	250079	11	11	0	0	10	0	0	30	0	0	10	20	0	0	20	1	10