Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

MOV (bitmask immediate, 32-bit)

Test 1: uops

Code:

  mov w0, #0xaaaaaaaa
  nop ; nop ; nop

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 3 nops): 1.000

Issues: 0.000

Integer unit issues: 0.001

Load/store unit issues: 0.000

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)map int uop (7c)? int output thing (e9)? int retires (ef)
4004203611100011000
4004105811100011000
4004102511100011000
4004102511100011000
4004102511100011000
4004107811100011000
4004102511100011000
4004102511100011000
4004102511100011000
4004102511100011000

Test 2: throughput

Count: 8

Code:

  mov w0, #0xaaaaaaaa
  mov w1, #0xaaaaaaaa
  mov w2, #0xaaaaaaaa
  mov w3, #0xaaaaaaaa
  mov w4, #0xaaaaaaaa
  mov w5, #0xaaaaaaaa
  mov w6, #0xaaaaaaaa
  mov w7, #0xaaaaaaaa

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.2511

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
802042033540012400124001512003940013802272003991080100
802042009440010400104001312003640012802242003993980100
802042010540010400104001312003640012802242003990980100
802042008640009400094001212003640012802242003990980100
802042008640009400094001212003640012802242003990980100
802042008640009400094001212003640012802242003990980100
802042008640009400094001212003640012802242003990980100
802042008640009400094001212003640012802242003990980100
802042008640009400094001212003640012802242003990980100
802042008640009400094001212003640012802242003990980100

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.2510

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
80024219564002240022400251200454001080020204000180010
80024201964001140011400101200484001080020204000180010
80024200984001140011400101200494001080020204000180010
80024200544001140011400101200494001080020204000180010
80024200544001140011400101200494001080020204000180010
80024200544001140011400101200494001080020204000180010
80024200544001140011400101200494001080020204000180010
80024200544001140011400101200494001080020204000180010
80024200544001140011400101200494001080020204000180010
80024200544001140011400101200494001080020204000180010