Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

MSR (FPCR)

Test 1: uops

Code:

  msr fpcr, x0
  mrs x0, fpcr

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 1.001

Load/store unit issues: 0.000

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)? int output thing (e9)
100410024100110011001
100410024100110011001
100410024100110011001
100410024100110011001
100410024100110011001
100410024100110011001
100410024100110011001
100410024100110011001
100410024100110011001
100410024100110011001

Test 2: throughput

Code:

  msr fpcr, x0
  mrs x0, fpcr

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 10.0024

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
10204100024101011010110030010020020010001100
10204100024101011010110030010020020010001100
10204100024101011010110030010020220010001100
10204100024101011010110030010020020010001100
10204100024101011010110030010020020010001100
10204100024101011010110030010020020010001100
10205100048101011010110030010020020010001100
10204100024101011010110030010020020010001100
10204100024101011010110030010020020010001100
10204100024101011010110030010020020010001100

1000 unrolls and 10 iterations

Result (median cycles for code): 10.0024

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
10024100024100111001110301020201000110
10024100024100111001110301020201000110
10024100024100111001110301020201000110
10024100024100111001110301020201000110
10024100024100111001110301020201000110
10024100024100111001110301020201000110
10024100024100111001110301020201000110
10024100024100111001110301020201000110
10024100024100111001110301020201000110
10024100024100111001110301020201000110