Icestorm: PACDB measurements

Code:

  pacdb x0, x1

Initialization

  mov x0, 1

(requires arm64e binary, with arm64e_preview_abi boot arg)

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 1.001

Load/store unit issues: 0.000

SIMD/FP unit issues: 0.000

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	dispatch int uop (56)	int uops in schedulers (59)	dispatch uop (78)	? int output thing (e9)	? int retires (ef)
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000
1004	6029	1001	1001	1000	52725	1000	1001	1000

Test 2: Latency 1->1

Code:

  pacdb x0, x1

Initialization

  mov x0, 1

(requires arm64e binary, with arm64e_preview_abi boot arg)

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 6.0029

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	schedule ldst uop (55)	dispatch int uop (56)	int uops in schedulers (59)	dispatch uop (78)	map int uop (7c)	map int uop inputs (7f)	map ldst uop inputs (80)	? int output thing (e9)	? ldst retires (ed)	? simd retires (ee)	? int retires (ef)
10205	60058	10206	10206	0	10213	530325	10200	200	200	0	10101	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	200	0	10101	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	200	0	10101	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	200	0	10101	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	200	0	10101	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	202	0	10105	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	200	0	10101	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	200	0	10101	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	200	0	10101	0	0	10100
10204	60029	10201	10201	0	10200	530325	10200	200	200	0	10101	0	0	10100

1000 unrolls and 10 iterations

Result (median cycles for code): 6.0029

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	dispatch int uop (56)	int uops in schedulers (59)	dispatch uop (78)	map int uop (7c)	map int uop inputs (7f)	? int output thing (e9)	? int retires (ef)
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010
10024	60029	10021	10021	10020	529885	10031	20	20	10011	10010
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010
10024	60029	10021	10021	10020	529785	10020	20	20	10011	10010

Test 3: Latency 1->2

Chain cycles: 1

Code:

  add x1, x0, x0
  mov x0, 0
  pacdb x0, x1

Initialization

  mov x0, 1

(requires arm64e binary, with arm64e_preview_abi boot arg)

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code, minus 1 chain cycle): 6.0029

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	dispatch int uop (56)	int uops in schedulers (59)	dispatch uop (78)	map int uop (7c)	map int uop inputs (7f)	? int output thing (e9)	? int retires (ef)
30204	70029	20201	20201	20202	1429562	20202	10204	20208	20101	30100
30204	70029	20201	20201	20202	1429568	20202	10204	20208	20101	30100
30204	70029	20201	20201	20202	1429568	20202	10204	20208	20101	30100
30204	70029	20201	20201	20202	1429568	20202	10204	20208	20101	30100
30204	70029	20201	20201	20202	1429568	20202	10204	20208	20101	30100
30204	70029	20201	20201	20202	1429568	20202	10204	20208	20101	30100
30204	70029	20201	20201	20202	1429839	20227	10221	20208	20101	30100
30204	70029	20201	20201	20202	1429568	20202	10204	20208	20101	30100
30204	70029	20201	20201	20202	1429568	20202	10204	20208	20101	30100
30204	70029	20201	20201	20202	1429568	20202	10204	20208	20101	30100

1000 unrolls and 10 iterations

Result (median cycles for code, minus 1 chain cycle): 6.0029

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	dispatch int uop (56)	int uops in schedulers (59)	dispatch uop (78)	map int uop (7c)	map int uop inputs (7f)	? int output thing (e9)	? int retires (ef)
30024	70029	20021	20021	20022	1429198	20020	10020	20020	20011	30010
30025	70058	20025	20025	20047	1429198	20020	10020	20020	20011	30010
30024	70029	20021	20021	20020	1429198	20020	10020	20020	20011	30010
30024	70029	20021	20021	20020	1429198	20020	10020	20020	20011	30010
30024	70029	20021	20021	20020	1429198	20020	10020	20020	20011	30010
30024	70029	20021	20021	20020	1429198	20020	10020	20020	20011	30010
30024	70029	20021	20021	20020	1429198	20020	10020	20020	20011	30010
30024	70029	20021	20021	20020	1429198	20020	10020	20020	20011	30010
30024	70029	20021	20021	20020	1429198	20020	10020	20020	20011	30010
30025	70059	20025	20025	20046	1429198	20020	10020	20020	20011	30010

Test 4: throughput

Count: 8

Code:

  pacdb x0, x8
  pacdb x1, x8
  pacdb x2, x8
  pacdb x3, x8
  pacdb x4, x8
  pacdb x5, x8
  pacdb x6, x8
  pacdb x7, x8

(requires arm64e binary, with arm64e_preview_abi boot arg)

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 2.0004

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	dispatch int uop (56)	int uops in schedulers (59)	dispatch uop (78)	map int uop (7c)	map int uop inputs (7f)	? int output thing (e9)	? int retires (ef)
80204	160030	80201	80201	80202	1360379	80202	200	200	80111	80100
80204	160030	80201	80201	80202	1360430	80202	200	200	80101	80100
80204	160030	80201	80201	80202	1360481	80202	200	200	80101	80100
80204	160030	80201	80201	80202	1360481	80202	200	200	80101	80100
80204	160030	80201	80201	80202	1360481	80202	200	200	80101	80100
80205	160064	80210	80210	80220	1360481	80202	200	200	80101	80100
80204	160030	80201	80201	80202	1360481	80202	200	200	80101	80100
80204	160030	80201	80201	80202	1360481	80202	200	200	80101	80100
80204	160030	80201	80201	80202	1360481	80202	200	200	80101	80100
80204	160030	80201	80201	80202	1360481	80202	200	200	80101	80100

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 2.0004

Recorded non-zero counters (first 10 of 64 runs)

retire uop (01)	cycle (02)	schedule uop (52)	schedule int uop (53)	dispatch int uop (56)	int uops in schedulers (59)	dispatch uop (78)	map int uop (7c)	map int uop inputs (7f)	? int output thing (e9)	? int retires (ef)
80024	160030	80021	80021	80022	1359941	80022	20	20	80021	80010
80024	160030	80021	80021	80020	1359931	80020	20	20	80011	80010
80024	160030	80021	80021	80020	1359931	80020	20	20	80011	80010
80024	160030	80021	80021	80020	1359931	80020	20	20	80011	80010
80025	160064	80031	80031	80040	1360048	80040	20	20	80011	80010
80024	160030	80021	80021	80020	1359931	80020	20	20	80011	80010
80024	160030	80021	80021	80020	1359931	80020	20	20	80011	80010
80024	160030	80021	80021	80020	1359931	80020	20	20	80011	80010
80025	160064	80031	80031	80040	1359931	80020	20	20	80063	80010
80024	160030	80021	80021	80020	1359931	80020	20	20	80011	80010

PACDB

Test 1: uops

1000 unrolls and 1 iteration

Test 2: Latency 1->1

100 unrolls and 100 iterations

1000 unrolls and 10 iterations

Test 3: Latency 1->2

100 unrolls and 100 iterations

1000 unrolls and 10 iterations

Test 4: throughput

100 unrolls and 100 iterations

1000 unrolls and 10 iterations