Apple Microarchitecture Research by Dougall Johnson

M1/A14 P-core (Firestorm): Overview | Base Instructions | SIMD and FP Instructions
M1/A14 E-core (Icestorm):  Overview | Base Instructions | SIMD and FP Instructions

SUB (sxtx, 64-bit)

Test 1: uops

Code:

  sub x0, x0, x1, sxtx
  mov x0, 1
  mov x1, 2

(no loop instructions)

1000 unrolls and 1 iteration

Retires: 1.000

Issues: 1.000

Integer unit issues: 1.001

Load/store unit issues: 0.000

SIMD/FP unit issues: 0.000

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000
100410301001100110002560310001000200010011000

Test 2: Latency 1->2

Code:

  sub x0, x0, x1, sxtx
  mov x0, 1
  mov x1, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 1.0030

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
10204100301010110101101082592061010710212202281000110100
10204100301010110101101082595391010710212202281000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100

1000 unrolls and 10 iterations

Result (median cycles for code): 1.0030

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
10024100301002110021100282595281003010038200521001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010

Test 3: Latency 1->3

Code:

  sub x0, x1, x0, sxtx
  mov x0, 1
  mov x1, 2

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code): 1.0030

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
10204100301010110101101072594351010710214202281000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100
10204100301010110101101072595391010710212202241000110100

1000 unrolls and 10 iterations

Result (median cycles for code): 1.0030

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
10024100301002110021100292595281003010038200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010
10024100301002110021100202595911002010020200201001110010

Test 4: throughput

Count: 8

Code:

  sub x0, x8, x9, sxtx
  sub x1, x8, x9, sxtx
  sub x2, x8, x9, sxtx
  sub x3, x8, x9, sxtx
  sub x4, x8, x9, sxtx
  sub x5, x8, x9, sxtx
  sub x6, x8, x9, sxtx
  sub x7, x8, x9, sxtx
  mov x8, 9
  mov x9, 10

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.3342

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
802042685880115801158012024036080120802221602448001580100
802042674280114801148011924036080120802241602488001580100
802042673780115801158012024036080120802241602488001580100
802042673780115801158012024036080120802241602488001580100
802052676680158801588017224035780119802211602488001580100
802042673780115801158012024036080120802241602488001580100
802042673780115801158012024036080120802241602488001580100
802042673780115801158012024036080120802241602488001580100
802042673780115801158012024036080120802241602488001580100
802042673780115801158012024036080120802241602488001580100

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.3339

retire uop (01)cycle (02)schedule uop (52)schedule int uop (53)dispatch int uop (56)int uops in schedulers (59)dispatch uop (78)map int uop (7c)map int uop inputs (7f)? int output thing (e9)? int retires (ef)
800242798780039800398004426414880043800461600208001180010
800242678080021800218002028273880020800201600208001180010
800242671980021800218002028273880020800201600208001180010
800242671380021800218002028273880020800201600208001180010
800242671880021800218002028273880020800201600208001180010
800242671380021800218002028273880020800201600208001180010
800242671380021800218002028273880020800201600208001180010
800242671880021800218002028273880020800201600208001180010
800242671380021800218002028273880020800201600208001180010
800242671380021800218002028273880020800201600208001180010